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Subject: [Bug tree-optimization/114278] ICE: in extract_bit_field_1, at
 expmed.cc:1838 with memmove, _BitInt() and -O2 -fno-tree-dce -fno-tree-dse
 -fno-tree-ccp -m32
Date: Mon, 11 Mar 2024 10:02:03 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D114278

--- Comment #3 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Jakub Jelinek <jakub@gcc.gnu.org>:

https://gcc.gnu.org/g:dbe5ccda4dbbd064c703cd3ab2a58ea40f08dd1a

commit r14-9424-gdbe5ccda4dbbd064c703cd3ab2a58ea40f08dd1a
Author: Jakub Jelinek <jakub@redhat.com>
Date:   Mon Mar 11 11:00:54 2024 +0100

    bitint: Avoid rewriting large/huge _BitInt vars into SSA after bitint
lowering [PR114278]

    The following testcase ICEs, because update-address-taken subpass of
    fre5 rewrites
      _BitInt(128) b;
      vector(16) unsigned char _3;

      <bb 2> [local count: 1073741824]:
      _3 =3D MEM <vector(16) unsigned char> [(char * {ref-all})p_2(D)];
      MEM <vector(16) unsigned char> [(char * {ref-all})&b] =3D _3;
      b =3D{v} {CLOBBER(eos)};
    to
      _BitInt(128) b;
      vector(16) unsigned char _3;

      <bb 2> [local count: 1073741824]:
      _3 =3D MEM <vector(16) unsigned char> [(char * {ref-all})p_2(D)];
      b_5 =3D VIEW_CONVERT_EXPR<_BitInt(128)>(_3);
    but we can't have large/huge _BitInt vars in SSA form after the bitint
    lowering except for function arguments loaded from memory, as expansion
    isn't able to deal with those, it relies on bitint lowering to lower
    those operations.
    The following patch fixes that by setting DECL_NOT_GIMPLE_REG_P for
    large/huge _BitInt vars after bitint lowering, such that we don't
    rewrite them into SSA form.

    2024-03-11  Jakub Jelinek  <jakub@redhat.com>

            PR tree-optimization/114278
            * tree-ssa.cc (maybe_optimize_var): If large/huge _BitInt vars =
are
no
            longer addressable, set DECL_NOT_GIMPLE_REG_P on them.

            * gcc.dg/bitint-99.c: New test.=