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From: "pinskia at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/114310] [11/12/13/14 Regression] [aarch64]
 __sync_val_compare_and_swap fails on __int128_t with newval = 0
Date: Tue, 12 Mar 2024 00:25:44 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D114310

--- Comment #3 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
(In reply to Jeffrey A. Law from comment #2)
> !?!  That doesn't make any sense to me Andrew.   This is a failure to mat=
ch
> the insn, not a constraint error.  And given the existence of a zero
> register, isn't zero valid anywhere a general purpose register is valid?

Then the issue is with the other side of UNSPECV_ATOMIC_CMPSW for the isns =
part
rather than the expand part.  I had only quickly looked the MD file and what
was done to fix the other bug.=