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From: "Explorer09 at gmail dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/114490] Optimization: x86 "shl" condition codes never reused
Date: Tue, 26 Mar 2024 23:52:04 +0000 [thread overview]
Message-ID: <bug-114490-4-vSCrzkdqLo@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-114490-4@http.gcc.gnu.org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114490
--- Comment #3 from Kang-Che Sung <Explorer09 at gmail dot com> ---
(In reply to Andrew Pinski from comment #2)
>
> Basically if you are shifting by 0, then the CF bit never changes from the
> previous and this can't be done.
>
> So the comment in the backend is correct and there is no way to remove the
> test (unless you know ch can't be 0).
What if I had the CF cleared to 0 already before the shift?
Even when the flags don't change when the value in the CL register is zero, if
I had the flags in a known state, the optimization can still be done.
And my suggested 'my_isxdigit_2' code worked before I know the caveat of the
shift instructions... ("xorl %eax, %eax" -> CF = SF = 0)
next prev parent reply other threads:[~2024-03-26 23:52 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-03-26 22:50 [Bug target/114490] New: " Explorer09 at gmail dot com
2024-03-26 23:11 ` [Bug target/114490] " pinskia at gcc dot gnu.org
2024-03-26 23:26 ` pinskia at gcc dot gnu.org
2024-03-26 23:52 ` Explorer09 at gmail dot com [this message]
2024-03-27 11:28 ` Explorer09 at gmail dot com
2024-03-27 12:41 ` Explorer09 at gmail dot com
2024-03-27 19:08 ` pinskia at gcc dot gnu.org
2024-03-28 8:53 ` Explorer09 at gmail dot com
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