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From: "juzhe.zhong at rivai dot ai" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/114506] RISC-V: expect M8 but M4 generated with dynamic
 LMUL
Date: Thu, 28 Mar 2024 10:49:12 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D114506

JuzheZhong <juzhe.zhong at rivai dot ai> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |juzhe.zhong at rivai dot ai

--- Comment #4 from JuzheZhong <juzhe.zhong at rivai dot ai> ---
(In reply to Andrew Pinski from comment #2)
> Using -fno-vect-cost-model forces the use of M8 though.
>=20
> I have no idea how this cost model is trying to prove here.

We shouldn't force M8.

We have support dynamic LMUL cost model heuristically analyze the vector
register
pressure in SSA level. So that we could pick the optimal LMUL.

This PR presents shows that RVV dynamic LMUL cost model pick LMUL 4 instead=
 of
LMUL 8 unexpectedly.

So we should adjust the dynamic LMUL cost model to fix this issue.=