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From: "dizhao at os dot amperecomputing.com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug rtl-optimization/114513] New: [aarch64] floating-point
 registers are used when GPRs are preferred
Date: Thu, 28 Mar 2024 09:10:40 +0000
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X-Bugzilla-Product: gcc
X-Bugzilla-Component: rtl-optimization
X-Bugzilla-Version: 14.0
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X-Bugzilla-Who: dizhao at os dot amperecomputing.com
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D114513

            Bug ID: 114513
           Summary: [aarch64] floating-point registers are used when GPRs
                    are preferred
           Product: gcc
           Version: 14.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: rtl-optimization
          Assignee: unassigned at gcc dot gnu.org
          Reporter: dizhao at os dot amperecomputing.com
  Target Milestone: ---

For the case below:

  typedef unsigned long int uint64_t;
  extern uint64_t rand_long ();

  double phi ()
  {
    double phi;
    register uint64_t a, b;
    const uint64_t mask =3D 1ULL << 63;
    int i;

    /* Pick any two starting points */
    a =3D rand_long ();
    b =3D rand_long ();

    /* Iterate until we approach overflow */
    for (i =3D 0; (i < 64) && !((a | b) & mask); i++)
      {
        register uint64_t c =3D a + b;

        a =3D b;
        b =3D c;
      }

    phi =3D (double) b / (double) a;
    return phi;
  }

On aarch64, GCC used floating-point registers for the loop:
    subs    w1, w1, #0x1
    fmov    d15, d31
    fmov    d31, x2
    b.eq    48 <phi+0x48>  // b.none

However, keeping "a" and "b" in GENERAL_REGS is much faster, like:
    mov   x19, x0=20=20=20=20=20
    mov   x0, x3=20=20=20=20=20=20
    subs  w2, w2, #0x1
    b.eq  48

The option I used is -Ofast/-O3, with
-mtune=3Dgeneric/neoverse-n1/neoverse-n2/ampere1 .=