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From: "deminhan at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org> To: gcc-bugs@gcc.gnu.org Subject: [Bug target/114516] New: RISC-V: TSVC2 s315 has spill with dynamic lmul Date: Thu, 28 Mar 2024 10:29:14 +0000 [thread overview] Message-ID: <bug-114516-4@http.gcc.gnu.org/bugzilla/> (raw) https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114516 Bug ID: 114516 Summary: RISC-V: TSVC2 s315 has spill with dynamic lmul Product: gcc Version: unknown Status: UNCONFIRMED Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: deminhan at gcc dot gnu.org Target Milestone: --- -march=rv64gcv_zba_zbb -mabi=lp64d -mrvv-max-lmul=dynamic -O3 typedef float real_t; __attribute__((aligned(64))) real_t a[32000]; real_t s315() { for (int i = 0; i < 32000; i++) a[i] = (i * 7) % 32000; real_t x, chksum; int index; for (int nl = 0; nl < 256; nl++) { x = a[0]; index = 0; for (int i = 0; i < 32000; ++i) { if (a[i] > x) { x = a[i]; index = i; } } chksum = x + (real_t) index; } return index + x + 1; } M8 is selected and has register spill. .LFB0: .cfi_startproc li a2,274878464 vsetvli a1,zero,e32,m8,ta,ma addiw a2,a2,-557 vmv.v.x v8,a2 csrr t0,vlenb slli t1,t0,3 li a4,32768 addiw a4,a4,-768 sub sp,sp,t1 .cfi_escape 0xf,0x9,0x72,0,0x92,0xa2,0x38,0,0x40,0x1e,0x22 vs8r.v v8,0(sp) vmv.v.x v8,a4 li a3,32768 lui a4,%hi(a) vmv8r.v v0,v8 vid.v v16 addi a6,a4,%lo(a) addi a3,a3,-768 addi a4,a4,%lo(a) .L2: vsetvli a5,a3,e8,m2,ta,ma vsetvli a2,zero,e32,m8,ta,ma vmv.v.i v8,7 vsetvli zero,a5,e32,m8,ta,ma sub a3,a3,a5 vmul.vv v24,v16,v8 vl8re32.v v8,0(sp) vmulh.vv v8,v24,v8 vsra.vi v8,v8,11 vnmsub.vv v8,v0,v24 vsetvli a2,zero,e32,m8,ta,ma vmv.v.x v24,a5 vsetvli zero,a5,e32,m8,ta,ma vfcvt.f.x.v v8,v8 vsetvli a2,zero,e32,m8,ta,ma vadd.vv v16,v16,v24 vsetvli zero,a5,e32,m8,ta,ma vse32.v v8,0(a4) sh2add a4,a5,a4 bne a3,zero,.L2 flw fa3,0(a6) li a3,32768 addi a3,a3,-768 li a0,256
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