From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 7096B3858C50; Wed, 10 Apr 2024 09:07:12 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 7096B3858C50 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1712740032; bh=+ompz+AjT2FbPSfB6tEuSTAUA+4eY1BGvMTqdbldG2A=; h=From:To:Subject:Date:In-Reply-To:References:From; b=mZK/k4h/dt4lc4c67Dqbd0qmN03fPrsRgUbjItbGCFfDsylUN+IuoBzlStNuRlGUt V4Vg1ecMDAkPwDtRup8ekrIuM35tk+CPt+wZoi04cf4HJUA/X/ZmlQMlJmVrN2Xw66 UWdh9YVBsrLXkF2qC2CdPDF+IfAyAwIXwLmJvwiY= From: "ubizjak at gmail dot com" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/114591] [12/13/14 Regression] register allocators introduce an extra load operation since gcc-12 Date: Wed, 10 Apr 2024 09:07:12 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 13.2.0 X-Bugzilla-Keywords: missed-optimization, ra X-Bugzilla-Severity: normal X-Bugzilla-Who: ubizjak at gmail dot com X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P2 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: 12.4 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D114591 --- Comment #10 from Uro=C5=A1 Bizjak --- (In reply to Hongtao Liu from comment #5) > > My experience is memory cost for the operand with rm or separate r, m is > > different which impacts RA decision. > >=20 > > https://gcc.gnu.org/pipermail/gcc-patches/2022-May/595573.html >=20 > Change operands[1] alternative 2 from m -> rm, then RA makes perfect > decision. Yes, I can confirm this oddity: movl v1(%rip), %edx # 5 [c=3D6 l=3D6] *zero_extendsidi2/3 movq %rdx, v2(%rip) # 16 [c=3D4 l=3D7] *movdi_internal/5 movq %rdx, %rax # 18 [c=3D4 l=3D3] *movdi_internal/3 ret # 21 [c=3D0 l=3D1] simple_return_internal But even there is room for improvement. The last move can be eliminated by allocating %eax in the first instruction.=