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From: "ubizjak at gmail dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/114591] [12/13/14 Regression] register allocators
 introduce an extra load operation since gcc-12
Date: Wed, 10 Apr 2024 07:51:22 +0000
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X-Bugzilla-Type: changed
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X-Bugzilla-Product: gcc
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X-Bugzilla-Version: 13.2.0
X-Bugzilla-Keywords: missed-optimization, ra
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D114591

--- Comment #3 from Uro=C5=A1 Bizjak <ubizjak at gmail dot com> ---
(In reply to Jakub Jelinek from comment #2)
> This changed with r12-5584-gca5667e867252db3c8642ee90f55427149cd92b6

Strange, if I revert the constraints to the previous setting with:=20

--cut here--
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 10ae3113ae8..262dd25a8e0 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -2870,9 +2870,9 @@ (define_peephole2

 (define_insn "*movhi_internal"
   [(set (match_operand:HI 0 "nonimmediate_operand"
-    "=3Dr,r,r,m ,*k,*k ,r ,m ,*k ,?r,?*v,*Yv,*v,*v,jm,m")
+    "=3Dr,r,r,m ,*k,*k ,*r ,*m ,*k ,?r,?v,*Yv,*v,*v,*jm,*m")
        (match_operand:HI 1 "general_operand"
-    "r ,n,m,rn,r ,*km,*k,*k,CBC,*v,r  ,C  ,*v,m ,*x,*v"))]
+    "r ,n,m,rn,*r ,*km,*k,*k,CBC,v,r  ,C  ,v,m ,x,v"))]
   "!(MEM_P (operands[0]) && MEM_P (operands[1]))
    && ix86_hardreg_mov_ok (operands[0], operands[1])"
 {
--cut here--

I still get:

        movl    v1(%rip), %eax  # 6     [c=3D6 l=3D6]  *zero_extendsidi2/3
        movq    %rax, v2(%rip)  # 16    [c=3D4 l=3D7]  *movdi_internal/5
        movzwl  v1(%rip), %eax  # 7     [c=3D5 l=3D7]  *movhi_internal/2=