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From: "rguenth at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug middle-end/114733] [14] Miscompile with -march=rv64gcv -O3 on riscv
Date: Tue, 16 Apr 2024 08:08:05 +0000	[thread overview]
Message-ID: <bug-114733-4-b5vQiC7QQL@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-114733-4@http.gcc.gnu.org/bugzilla/>

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114733

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |ASSIGNED
     Ever confirmed|0                           |1
           Assignee|unassigned at gcc dot gnu.org      |rguenth at gcc dot gnu.org

--- Comment #2 from Richard Biener <rguenth at gcc dot gnu.org> ---
  <bb 2> [local count: 9582068]:
  b_lsm.9_16 = b;
  _20 = -b_lsm.9_16;
  b = _20;
  __builtin_printf ("%ld\n", _20);
  return 0;

we unroll the inner loop and then vectorize with 8 byte vectors which
means exposing V1DImode vectors which I think runs into the very same
issue (VF is "even").

  parent reply	other threads:[~2024-04-16  8:08 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-16  4:30 [Bug middle-end/114733] New: " patrick at rivosinc dot com
2024-04-16  7:44 ` [Bug middle-end/114733] " rdapp at gcc dot gnu.org
2024-04-16  8:08 ` rguenth at gcc dot gnu.org [this message]
2024-04-16  8:43 ` rguenth at gcc dot gnu.org
2024-04-16 10:37 ` cvs-commit at gcc dot gnu.org
2024-04-16 10:39 ` [Bug middle-end/114733] [13 Regression] " rguenth at gcc dot gnu.org
2024-05-03 13:55 ` cvs-commit at gcc dot gnu.org
2024-05-03 13:58 ` rguenth at gcc dot gnu.org

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