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From: "rdapp at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/114734] [14] RISC-V rv64gcv_zvl256b miscompile with
 -flto -O3 -mrvv-vector-bits=zvl
Date: Mon, 22 Apr 2024 15:45:54 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D114734

--- Comment #5 from Robin Dapp <rdapp at gcc dot gnu.org> ---
What happens is that code sinking does:

Sinking # VUSE <.MEM_1235>
vect__173.251_1238 =3D .MASK_LEN_LOAD (_911, 32B, { -1, -1, -1, -1 },
loop_len_1064, 0);
 from bb 3 to bb 4

so we have

vect__173.251_1238 =3D .MASK_LEN_LOAD (_911, 32B, { -1, -1, -1, -1 },
loop_len_1064, 0);

after the loop.

When expanding this stmt expand_call_mem_ref creates a mem reference to
vectp_g.178 for _911 (=3D=3D vectp_g.178_1078).  This is expanded to the sa=
me rtl
as vectp_g.178_1079 (which is incremented before the latch as opposed to
...1078 which is not).

Disabling sinking or expand_call_mem_ref both help but neither is correct of
course :)  I don't have a solution yet but I'd hope we're a bit closer to t=
he
problem now.=