From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <gcc-bugzilla@gcc.gnu.org>
Received: by sourceware.org (Postfix, from userid 48)
	id A8CE0384AB55; Fri, 26 Apr 2024 21:21:48 +0000 (GMT)
DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org A8CE0384AB55
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org;
	s=default; t=1714166508;
	bh=AAuORjgDbNC01tPddmMvfiYt+lN7LlpuMBKcftBEnNg=;
	h=From:To:Subject:Date:In-Reply-To:References:From;
	b=kZWjv7nBDamJgOepxl4TFOm4pyKrUOIX3W0Puw3bV5BeEWfLBA3eDsLMdWjuBkWfP
	 /l6fqYhx0b142rkYfNcOwq9gRlYj4mDSvAQ0eR3+sC2Rs4P/lUz/AHmj6JhfB+O9lc
	 A/c1ZAdO+z6hDNHwSlFzjXhfGhihL8sme3NtRCgA=
From: "jakub at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/114801] [14/15 Regression] arm: ICE in
 find_cached_value, at rtx-vector-builder.cc:100 with MVE intrinsics
Date: Fri, 26 Apr 2024 21:21:48 +0000
X-Bugzilla-Reason: CC
X-Bugzilla-Type: changed
X-Bugzilla-Watch-Reason: None
X-Bugzilla-Product: gcc
X-Bugzilla-Component: target
X-Bugzilla-Version: 14.0
X-Bugzilla-Keywords: ice-on-valid-code
X-Bugzilla-Severity: normal
X-Bugzilla-Who: jakub at gcc dot gnu.org
X-Bugzilla-Status: ASSIGNED
X-Bugzilla-Resolution: 
X-Bugzilla-Priority: P3
X-Bugzilla-Assigned-To: clyon at gcc dot gnu.org
X-Bugzilla-Target-Milestone: 14.0
X-Bugzilla-Flags: 
X-Bugzilla-Changed-Fields: 
Message-ID: <bug-114801-4-9QQuTBehhu@http.gcc.gnu.org/bugzilla/>
In-Reply-To: <bug-114801-4@http.gcc.gnu.org/bugzilla/>
References: <bug-114801-4@http.gcc.gnu.org/bugzilla/>
Content-Type: text/plain; charset="UTF-8"
Content-Transfer-Encoding: quoted-printable
X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/
Auto-Submitted: auto-generated
MIME-Version: 1.0
List-Id: <gcc-bugs.sourceware.org>

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D114801

--- Comment #15 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
https://developer.arm.com/documentation/101028/0012/14--M-profile-Vector-Ex=
tension--MVE--intrinsics
suggests that it is a UB if all the bits for a single element aren't the sa=
me
(i.e. false is all 0s, true is all 1s aka -1, anything else UB).
So the testcase is invalid at runtime, right?
It probably shouldn't error because it can be in dead code, and it certainly
shouldn't ICE, it could emit __builtin_trap or it can just canonicalize it =
any
way it likes it.

Seems you are canonicalizing that to 1s, given the HW behavior I think it w=
ould
be more correct to canonicalize to -1s.

I think you could simply canonicalize on the CONST_INT, so
   else if (VALID_MVE_PRED_MODE (mode))
     {
       if (CONST_INT_P (x) && (mode =3D=3D V8BImode || mode =3D=3D V4BImode=
))
         {
           /* In V8BI or V4BI each element has 2 or 4 bits, if those
              bits aren't all the same, it is UB and gen_lowpart might
              ICE.  Canonicalize all the 2 or 4 bits to all ones if
              any of them is non-zero.  */
           unsigned HOST_WIDE_INT xi =3D UINTVAL (xi);
           xi |=3D ((xi & 0x5555) << 1) | ((xi & 0xaaaa) >> 1);
           if (mode =3D=3D V4BImode)
             xi |=3D ((xi & 0x3333) << 2) | ((xi & 0xcccc) >> 2);
           x =3D gen_int_mode (xi, HImode);
         }
       else if (SUBREG_P (x))
         /* gen_lowpart on a SUBREG can ICE.  */
         x =3D force_reg (GET_MODE (x), x);
       x =3D gen_lowpart (mode, x);
     }=