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From: "jakub at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/114801] [14/15 Regression] arm: ICE in
 find_cached_value, at rtx-vector-builder.cc:100 with MVE intrinsics
Date: Fri, 26 Apr 2024 13:26:55 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D114801

--- Comment #4 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
(In reply to Christophe Lyon from comment #3)
> lowpart_subreg does not work either.
>=20
> If we put the predicates in a variable in the testcase, then in
> function_expander::add_input_operand() x is already a (subreg/s/v:HI (reg=
:SI
> 116 [ _3 ]) 0) so taking gen_lowpart of that is OK (we just want HImode to
> get the 16 bits of predicates).

If x could be e.g. (subreg:SI (reg:DI ...) ...), then one needs to use for
GET_CODE (x) =3D=3D SUBREG && GET_MODE (x) !=3D mode do a force_reg first.

> But when predicates are passed as a constant as in the testcase, we have
> x =3D (const_int -13108 [0xffffffffffffcccc])
> and gen_lowpart (HImode, x) fails on that.

Why doesn't lowpart_subreg (mode, x, GET_MODE (x) =3D=3D VOIDmode ? DImode :
GET_MODE (x));
work?
I.e. for CONST_INTs assume it is some constant in a mode equal or wider than
mode.
Unless mode can be TImode or x can be __int128 constants, that is.

> I'm trying an approach to convert the constant into a vector of constants
> whose mode will V4BImode in this case.=