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From: "ubizjak at gmail dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/114810] [14 Regression] internal compiler error: in
 lra_split_hard_reg_for, at lra-assigns.cc:1868  (unable to find a register to
 spill) {*andndi3_doubleword_bmi} with -m32 -mstackrealign -O2 -mbmi
 -fno-exceptions -fno-plt
Date: Mon, 22 Apr 2024 19:10:32 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D114810

Uro=C5=A1 Bizjak <ubizjak at gmail dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |NEW
   Last reconfirmed|                            |2024-04-22
     Ever confirmed|0                           |1

--- Comment #3 from Uro=C5=A1 Bizjak <ubizjak at gmail dot com> ---
It is alternative 0 (=3D&r,r,ro) that causes the spill failure. Following
definition works OK:

(define_insn_and_split "*andn<dwi>3_doubleword_bmi"
  [(set (match_operand:<DWI> 0 "register_operand" "=3Dr,r")
        (and:<DWI>
          (not:<DWI> (match_operand:<DWI> 1 "register_operand" "0,r"))
          (match_operand:<DWI> 2 "nonimmediate_operand" "ro,0")))
   (clobber (reg:CC FLAGS_REG))]

and compiles to:

(insn 1150 1108 987 7 (set (reg:DI 2 cx [453])
        (reg:DI 3 bx [452])) "pr114810.C":296:6 84 {*movdi_internal}
     (nil))
(insn 987 1150 1151 7 (parallel [
            (set (reg:DI 2 cx [453])
                (and:DI (not:DI (reg:DI 2 cx [453]))
                    (reg:DI 0 ax [orig:217 _13 ] [217])))
            (clobber (reg:CC 17 flags))
        ]) "pr114810.C":296:6 703 {*andndi3_doubleword_bmi}
     (nil))=