From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <gcc-bugzilla@gcc.gnu.org>
Received: by sourceware.org (Postfix, from userid 48)
	id 28A153858D38; Mon, 22 Apr 2024 21:56:49 +0000 (GMT)
DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 28A153858D38
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org;
	s=default; t=1713823009;
	bh=tz/3ZAM1Z3/WjzTpLVHDXKOLuAviJAfrGjYZsI03ywY=;
	h=From:To:Subject:Date:In-Reply-To:References:From;
	b=AYJoFPbLXwIPHF+ag4HzQbsaNiXJ/lw1bNmom98OnQiiCNGZWUROZitN4kFzaYde0
	 lkj1dGYDop0769AKKyROATGNZj4efOOMDMxyaS6/AjmdqDV41Yj/MnXTHRHoTFwhfH
	 oPbw+W/jEq3lLNRChkvdMtatzuJgWXT4C/A3G/dg=
From: "jakub at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug rtl-optimization/114810] [14 Regression] internal compiler
 error: in lra_split_hard_reg_for, at lra-assigns.cc:1868  (unable to find a
 register to spill) {*andndi3_doubleword_bmi} with -m32 -mstackrealign -O2
 -mbmi -fno-exceptions -fno-plt
Date: Mon, 22 Apr 2024 21:56:49 +0000
X-Bugzilla-Reason: CC
X-Bugzilla-Type: changed
X-Bugzilla-Watch-Reason: None
X-Bugzilla-Product: gcc
X-Bugzilla-Component: rtl-optimization
X-Bugzilla-Version: 14.0
X-Bugzilla-Keywords: ra
X-Bugzilla-Severity: normal
X-Bugzilla-Who: jakub at gcc dot gnu.org
X-Bugzilla-Status: NEW
X-Bugzilla-Resolution: 
X-Bugzilla-Priority: P1
X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org
X-Bugzilla-Target-Milestone: 14.0
X-Bugzilla-Flags: 
X-Bugzilla-Changed-Fields: 
Message-ID: <bug-114810-4-oncsBmEc9d@http.gcc.gnu.org/bugzilla/>
In-Reply-To: <bug-114810-4@http.gcc.gnu.org/bugzilla/>
References: <bug-114810-4@http.gcc.gnu.org/bugzilla/>
Content-Type: text/plain; charset="UTF-8"
Content-Transfer-Encoding: quoted-printable
X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/
Auto-Submitted: auto-generated
MIME-Version: 1.0
List-Id: <gcc-bugs.sourceware.org>

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D114810

--- Comment #10 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
(In reply to Jakub Jelinek from comment #8)
> So, given the known ia32 register starvation, can't we split that first
> alternative to
> =3D&r,r,o with "nox64" isa and =3D&r,r,ro with "x64" isa?

Better make it a
(define_mode_attr andn_ro [(DI "o") (TI "ro")])
and use <andn_ro> instead of the first ro (or some better name).=