From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 536A1384AB66; Fri, 3 May 2024 00:30:16 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 536A1384AB66 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1714696216; bh=qy5Cs1OQttufoRhv0j1kfZ9tBMqU23vrMSMJ9ZVBmpc=; h=From:To:Subject:Date:In-Reply-To:References:From; b=wjv0R1ZyYiXUt/Kp8QSTzJ9KwTZJdHCv8akJ9k6vE6VQNL69EiZg2mZdVK9hAA+FQ 5RMsaH+z7vX7flPXqMoRSy+ohZH7gWXEYyOtQyo6Ui/kAe9Mx3C/lZlAJlBgh/fq0P bbaqAk/3bc+SANgcRMFiBrW4pwCcu4yFBtEmX19c= From: "nfxjfg at googlemail dot com" To: gcc-bugs@gcc.gnu.org Subject: [Bug middle-end/114923] gcc ignores escaping pointer and applies invalid optimization Date: Fri, 03 May 2024 00:30:15 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: middle-end X-Bugzilla-Version: unknown X-Bugzilla-Keywords: X-Bugzilla-Severity: normal X-Bugzilla-Who: nfxjfg at googlemail dot com X-Bugzilla-Status: RESOLVED X-Bugzilla-Resolution: INVALID X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D114923 --- Comment #9 from nfxjfg at googlemail dot com --- Oh, I completely missed that your statement was restricted to "in HW". Norm= ally there are mechanisms in place that make all CPU-level memory accesses to registers strictly ordered. (In our hardware that is also the case.) I pani= cked because you seemed to imply that even the compiler can reorder accesses to = reg1 and reg2, but this isn't the case according to you, the gcc docs, and maybe= the standard. Sorry about that. I suppose it's regrettable that C and gcc do not consider the possibility t= hat passing an address to a register (which volatile is pretty much the only us= eful thing for) does not imply that the memory at that address may change. But t= hat seems to be the conclusion here.=