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From: "nfxjfg at googlemail dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug middle-end/114923] gcc ignores escaping pointer and applies invalid optimization
Date: Thu, 02 May 2024 23:03:53 +0000	[thread overview]
Message-ID: <bug-114923-4-QiVa2BuoeH@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-114923-4@http.gcc.gnu.org/bugzilla/>

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114923

--- Comment #7 from nfxjfg at googlemail dot com ---
> Note also the order of the writes to reg1 and reg2 might happen in a different order in HW so you need to have a full (HW) write barrier between them to make sure the write is done in the correct order.

Seriously? That breaks literally all code that uses volatile for register
access (which, in our firmwares, is ALL code). This just fuels my belief that
gcc and C compiler developers in general turned C into a useless, fragile
language that can't do anything correctly.

Is there a way to prevent reordering of volatile accesses?

  parent reply	other threads:[~2024-05-02 23:03 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-02 12:51 [Bug c/114923] New: " nfxjfg at googlemail dot com
2024-05-02 12:52 ` [Bug c/114923] " nfxjfg at googlemail dot com
2024-05-02 13:24 ` amonakov at gcc dot gnu.org
2024-05-02 13:44 ` nfxjfg at googlemail dot com
2024-05-02 13:56 ` amonakov at gcc dot gnu.org
2024-05-02 19:07 ` [Bug middle-end/114923] " pinskia at gcc dot gnu.org
2024-05-02 19:15 ` pinskia at gcc dot gnu.org
2024-05-02 23:03 ` nfxjfg at googlemail dot com [this message]
2024-05-02 23:42 ` pinskia at gcc dot gnu.org
2024-05-03  0:30 ` nfxjfg at googlemail dot com

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