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From: "juzhe.zhong at rivai dot ai" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug c/114988] New: RISC-V: ICE in intrinsic
 __riscv_vfwsub_wf_f32mf2
Date: Wed, 08 May 2024 15:08:34 +0000
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X-Bugzilla-Version: 14.0
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D114988

            Bug ID: 114988
           Summary: RISC-V: ICE in intrinsic __riscv_vfwsub_wf_f32mf2
           Product: gcc
           Version: 14.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: c
          Assignee: unassigned at gcc dot gnu.org
          Reporter: juzhe.zhong at rivai dot ai
  Target Milestone: ---

https://godbolt.org/z/ncxrx3fK9

#include <stdint.h>
#include <riscv_vector.h>

vfloat32mf2_t test_vfwsub_wf_f32mf2(vfloat32mf2_t vs2, _Float16 rs1, size_t=
 vl)
{
  return __riscv_vfwsub_wf_f32mf2(vs2, rs1, vl);
}

with -march=3Drv64gcv -O3:

<source>:6:1: error: unrecognizable insn:
    6 | }
      | ^
(insn 8 5 12 2 (set (reg:RVVMF2SF 134 [ <retval> ])
        (if_then_else:RVVMF2SF (unspec:RVVMF64BI [
                    (const_vector:RVVMF64BI repeat [
                            (const_int 1 [0x1])
                        ])
                    (reg/v:DI 137 [ vl ])
                    (const_int 2 [0x2]) repeated x2
                    (const_int 0 [0])
                    (const_int 7 [0x7])
                    (reg:SI 66 vl)
                    (reg:SI 67 vtype)
                    (reg:SI 69 frm)
                ] UNSPEC_VPREDICATE)
            (minus:RVVMF2SF (reg/v:RVVMF2SF 135 [ vs2 ])
                (float_extend:RVVMF2SF (vec_duplicate:RVVMF4HF (reg/v:HF 13=
6 [
rs1 ]))))
            (unspec:RVVMF2SF [
                    (reg:DI 0 zero)
                ] UNSPEC_VUNDEF))) "<source>":5:10 -1
     (nil))

FP16 vector need zvfh, so such intrinsic should be reported as illegal
intrinsic in frontend instead of an ICE.

with -rv64gcv_zvfh:
It can be compiled:

        vsetvli zero,a0,e16,mf4,ta,ma
        vfwsub.wf       v8,v8,fa0
        ret=