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From: "ubizjak at gmail dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/115069] [14/15 regression] 8 bit integer vector performance regression, x86, between gcc-14 and gcc-13 using avx2 target clones on skylake platform
Date: Fri, 17 May 2024 08:26:41 +0000	[thread overview]
Message-ID: <bug-115069-4-FXo9FzfJ9j@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-115069-4@http.gcc.gnu.org/bugzilla/>

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115069

--- Comment #7 from Uroš Bizjak <ubizjak at gmail dot com> ---
(In reply to Hongtao Liu from comment #5)
> (In reply to Krzysztof Kanas from comment #4)
> > I bisected the issue and it seems that commit
> > 0368fc54bc11f15bfa0ed9913fd0017815dfaa5d introduces regression.
> 
> I guess the real guilty commit is 
> 
> commit 52ff3f7b863da1011b73c0ab3b11f6c78b6451c7
> Author: Uros Bizjak <ubizjak@gmail.com>
> Date:   Thu May 25 19:40:26 2023 +0200
>  
>     i386: Use 2x-wider modes when emulating QImode vector instructions
>  
>     Rewrite ix86_expand_vecop_qihi2 to expand fo 2x-wider (e.g. V16QI ->
> V16HImode)
>     instructions when available.  Currently, the compiler generates following
>     assembly for V16QImode multiplication (-mavx2):

The patch is at:

https://gcc.gnu.org/pipermail/gcc-patches/2023-May/619715.html

As mentioned in Comment #3, it looks that VPERMQ is a problematic insn. This
should be reflected in some cost function. Alternatively, we can simply change
the first line in:

+  if ((qimode == V16QImode && !TARGET_AVX2)
+      || (qimode == V32QImode && !TARGET_AVX512BW)
+      /* There are no V64HImode instructions.  */
+      || qimode == V64QImode)
+     return false;

to check "qimode == V16QImode && !TARGET_AVX512VL" to avoid VPERMQ:

diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc
index 4e16aedc5c1..450035ea9e6 100644
--- a/gcc/config/i386/i386-expand.cc
+++ b/gcc/config/i386/i386-expand.cc
@@ -24493,7 +24493,7 @@ ix86_expand_vecop_qihi2 (enum rtx_code code, rtx dest,
rtx op1, rtx op2)
   bool op2vec = GET_MODE_CLASS (GET_MODE (op2)) == MODE_VECTOR_INT;
   bool uns_p = code != ASHIFTRT;

-  if ((qimode == V16QImode && !TARGET_AVX2)
+  if ((qimode == V16QImode && !TARGET_AVX512VL)
       || (qimode == V32QImode && (!TARGET_AVX512BW || !TARGET_EVEX512))
       /* There are no V64HImode instructions.  */
       || qimode == V64QImode)

  parent reply	other threads:[~2024-05-17  8:26 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-13 13:05 [Bug target/115069] New: " colin.king at intel dot com
2024-05-13 13:07 ` [Bug target/115069] " colin.king at intel dot com
2024-05-13 13:07 ` colin.king at intel dot com
2024-05-15  8:51 ` haochen.jiang at intel dot com
2024-05-16  1:49 ` [Bug target/115069] [14/15 regression] " sjames at gcc dot gnu.org
2024-05-17  6:59 ` kkanas at fastmail dot com
2024-05-17  7:06 ` liuhongt at gcc dot gnu.org
2024-05-17  7:08 ` haochen.jiang at intel dot com
2024-05-17  8:26 ` ubizjak at gmail dot com [this message]
2024-05-17  8:41 ` ubizjak at gmail dot com
2024-05-17  8:48 ` ubizjak at gmail dot com
2024-05-17  9:13 ` haochen.jiang at intel dot com
2024-05-20  1:23 ` liuhongt at gcc dot gnu.org
2024-05-20  5:50 ` haochen.jiang at intel dot com
2024-05-20  6:27 ` ubizjak at gmail dot com
2024-05-20  6:35 ` liuhongt at gcc dot gnu.org
2024-05-20  6:38 ` haochen.jiang at intel dot com
2024-05-20  6:40 ` liuhongt at gcc dot gnu.org
2024-05-20  6:47 ` ubizjak at gmail dot com
2024-05-21  5:56 ` haochen.jiang at intel dot com
2024-05-21  5:58 ` haochen.jiang at intel dot com
2024-05-22  2:25 ` cvs-commit at gcc dot gnu.org
2024-05-22  2:27 ` cvs-commit at gcc dot gnu.org
2024-05-22  2:27 ` haochen.jiang at intel dot com
2024-05-22  5:13 ` liuhongt at gcc dot gnu.org

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