From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id DDD913858D20; Fri, 17 May 2024 07:08:50 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org DDD913858D20 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1715929730; bh=+3XMpdtDweyJ6EvA9bU3s4A1fQD/8ot0IzkGQyxNOdM=; h=From:To:Subject:Date:In-Reply-To:References:From; b=xO7SQpP6ecpUv9ti2t3HsWnrgixBCWySZ93RpJ6TD7Toa5876AoQasYyIX9WvFcIX mzhhiKRbM4xpc0eWnFa+kvNQ8vZO9JeEwGxAixfX+kgCcpna9/wzXY/k8vyTMsLRrl 4Mpr7/xk5F42tPl6cXaM4YPabkfrBLpHnRfqBtQQ= From: "haochen.jiang at intel dot com" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/115069] [14/15 regression] 8 bit integer vector performance regression, x86, between gcc-14 and gcc-13 using avx2 target clones on skylake platform Date: Fri, 17 May 2024 07:08:50 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Version: 14.0 X-Bugzilla-Keywords: missed-optimization X-Bugzilla-Severity: normal X-Bugzilla-Who: haochen.jiang at intel dot com X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: 14.2 X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 List-Id: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D115069 --- Comment #6 from Haochen Jiang --- (In reply to Hongtao Liu from comment #5) > (In reply to Krzysztof Kanas from comment #4) > > I bisected the issue and it seems that commit > > 0368fc54bc11f15bfa0ed9913fd0017815dfaa5d introduces regression. >=20 > I guess the real guilty commit is=20 >=20 > commit 52ff3f7b863da1011b73c0ab3b11f6c78b6451c7 > Author: Uros Bizjak > Date: Thu May 25 19:40:26 2023 +0200 >=20=20 > i386: Use 2x-wider modes when emulating QImode vector instructions >=20=20 > Rewrite ix86_expand_vecop_qihi2 to expand fo 2x-wider (e.g. V16QI -> > V16HImode) > instructions when available. Currently, the compiler generates follo= wing > assembly for V16QImode multiplication (-mavx2): Yes, since 0368fc54bc11f15bfa0ed9913fd0017815dfaa5d only fixed a typo in th= at patch. Original thread: https://gcc.gnu.org/pipermail/gcc-patches/2023-May/619745.= html=