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From: "cvs-commit at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org> To: gcc-bugs@gcc.gnu.org Subject: [Bug target/115142] [14/15 Regression] Unrecognizable insn in extract_insn, at recog.cc:2812 with -ftree-ter Date: Sun, 19 May 2024 15:57:07 +0000 [thread overview] Message-ID: <bug-115142-4-1GOdNcVIW9@http.gcc.gnu.org/bugzilla/> (raw) In-Reply-To: <bug-115142-4@http.gcc.gnu.org/bugzilla/> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115142 --- Comment #3 from GCC Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Jeff Law <law@gcc.gnu.org>: https://gcc.gnu.org/g:e1ce9c37ed68136a99d44c8301990c184ba41849 commit r15-652-ge1ce9c37ed68136a99d44c8301990c184ba41849 Author: Jeff Law <jlaw@ventanamicro.com> Date: Sun May 19 09:56:16 2024 -0600 [to-be-committed][RISC-V][PR target/115142] Do not create invalidate shift-add insn The circumstances which triggered this weren't something that should appear in the wild (-ftree-ter, without optimization enabled). So I wasn't planning to backport. Obviously if it shows up in another context we can revisit that decision. I've run this through my rv32gcv and rv64gc tester. Waiting on the CI system before committing. PR target/115142 gcc/ * config/riscv/riscv.cc (mem_shadd_or_shadd_rtx_p): Make sure shifted argument is a register. gcc/testsuite * gcc.target/riscv/pr115142.c: New test.
next prev parent reply other threads:[~2024-05-19 15:57 UTC|newest] Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top 2024-05-17 17:55 [Bug target/115142] New: " patrick at rivosinc dot com 2024-05-17 18:04 ` [Bug target/115142] " ewlu at rivosinc dot com 2024-05-18 14:23 ` law at gcc dot gnu.org 2024-05-18 21:30 ` law at gcc dot gnu.org 2024-05-18 21:30 ` law at gcc dot gnu.org 2024-05-19 15:57 ` cvs-commit at gcc dot gnu.org [this message] 2024-05-21 6:31 ` [Bug target/115142] [14 " rguenth at gcc dot gnu.org 2024-05-21 13:24 ` law at gcc dot gnu.org
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