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From: "law at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug testsuite/115262] [15 regression] gcc.target/powerpc/pr66144-3.c fails after r15-831-g05daf617ea22e1
Date: Mon, 10 Jun 2024 22:39:02 +0000 [thread overview]
Message-ID: <bug-115262-4-BjCI1URHwB@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-115262-4@http.gcc.gnu.org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115262
Jeffrey A. Law <law at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Ever confirmed|0 |1
Last reconfirmed| |2024-06-10
Status|UNCONFIRMED |NEW
--- Comment #1 from Jeffrey A. Law <law at gcc dot gnu.org> ---
It looks like the test wants to see xxsel, but after that change we get xxlor
and what looks like a slight difference in register allocation. I can't
really judge if the new code is better, worse is equivalent.
*** good.s 2024-06-10 16:33:48.717342836 -0600
--- bad.s 2024-06-10 16:34:01.005143026 -0600
*************** test:
*** 36,45 ****
lxvd2x 0,8,9
vcmpequw 1,1,12
vcmpequw 0,0,13
! xxsel 33,12,33,33
! xxsel 32,0,32,32
! stxvd2x 33,9,10
! stxvd2x 32,8,9
addi 9,9,32
bdnz .L2
blr
--- 36,45 ----
lxvd2x 0,8,9
vcmpequw 1,1,12
vcmpequw 0,0,13
! xxlor 12,12,33
! xxlor 0,0,32
! stxvd2x 12,9,10
! stxvd2x 0,8,9
addi 9,9,32
bdnz .L2
blr
next prev parent reply other threads:[~2024-06-10 22:39 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-28 15:57 [Bug testsuite/115262] New: " seurer at gcc dot gnu.org
2024-05-29 7:36 ` [Bug testsuite/115262] " rguenth at gcc dot gnu.org
2024-06-10 22:39 ` law at gcc dot gnu.org [this message]
2024-06-11 20:37 ` bergner at gcc dot gnu.org
2024-06-12 2:39 ` linkw at gcc dot gnu.org
2024-06-12 19:50 ` bergner at gcc dot gnu.org
2024-06-13 2:08 ` cvs-commit at gcc dot gnu.org
2024-06-13 2:10 ` bergner at gcc dot gnu.org
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