[Bug testsuite/115262] New: [15 regression] gcc.target/powerpc/pr66144-3.c fails after r15-831-g05daf617ea22e1

[Bug testsuite/115262] New: [15 regression] gcc.target/powerpc/pr66144-3.c fails after r15-831-g05daf617ea22e1

[seurer at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115262

            Bug ID: 115262
           Summary: [15 regression] gcc.target/powerpc/pr66144-3.c  fails
                    after r15-831-g05daf617ea22e1
           Product: gcc
           Version: 15.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: testsuite
          Assignee: unassigned at gcc dot gnu.org
          Reporter: seurer at gcc dot gnu.org
  Target Milestone: ---

g:05daf617ea22e1d818295ed2d037456937e23530, r15-831-g05daf617ea22e1
make  -k check-gcc RUNTESTFLAGS="powerpc.exp=gcc.target/powerpc/pr66144-3.c"
FAIL: gcc.target/powerpc/pr66144-3.c scan-assembler \\mxxsel\\M

This is probably just a test case that needs assembler instruction counts
updated.

commit 05daf617ea22e1d818295ed2d037456937e23530 (HEAD)
Author: Jeff Law <jlaw@ventanamicro.com>
Date:   Sat May 25 12:39:05 2024 -0600

    [committed] [v2] More logical op simplifications in simplify-rtx.cc

[Bug testsuite/115262] [15 regression] gcc.target/powerpc/pr66144-3.c fails after r15-831-g05daf617ea22e1

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115262

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Target Milestone|---                         |15.0

[Bug testsuite/115262] [15 regression] gcc.target/powerpc/pr66144-3.c fails after r15-831-g05daf617ea22e1

[law at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115262

Jeffrey A. Law <law at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
     Ever confirmed|0                           |1
   Last reconfirmed|                            |2024-06-10
             Status|UNCONFIRMED                 |NEW

--- Comment #1 from Jeffrey A. Law <law at gcc dot gnu.org> ---
It looks like the test wants to see xxsel, but after that change we get xxlor
and  what looks like a slight difference in register allocation.  I can't
really judge if the new code is better, worse is equivalent.

*** good.s      2024-06-10 16:33:48.717342836 -0600
--- bad.s       2024-06-10 16:34:01.005143026 -0600
*************** test:
*** 36,45 ****
        lxvd2x 0,8,9
        vcmpequw 1,1,12
        vcmpequw 0,0,13
!       xxsel 33,12,33,33
!       xxsel 32,0,32,32
!       stxvd2x 33,9,10
!       stxvd2x 32,8,9
        addi 9,9,32
        bdnz .L2
        blr
--- 36,45 ----
        lxvd2x 0,8,9
        vcmpequw 1,1,12
        vcmpequw 0,0,13
!       xxlor 12,12,33
!       xxlor 0,0,32
!       stxvd2x 12,9,10
!       stxvd2x 0,8,9
        addi 9,9,32
        bdnz .L2
        blr

[Bug testsuite/115262] [15 regression] gcc.target/powerpc/pr66144-3.c fails after r15-831-g05daf617ea22e1

[bergner at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115262

--- Comment #2 from Peter Bergner <bergner at gcc dot gnu.org> ---
(In reply to Jeffrey A. Law from comment #1)
> It looks like the test wants to see xxsel, but after that change we get
> xxlor and  what looks like a slight difference in register allocation.  I
> can't really judge if the new code is better, worse is equivalent.

xxsel XT,XA,XB,XC computes XT = (XA & ~XC) | (XB & XC).  Using De Morgan's law
given XB == XC, that seems to simplify to XT = XA | XB which is what you're
producing and an xxlor (a simple logical or) is not going to be slower than a
xxsel and is probably faster.  I agree with Bill that this looks like an
example of needing to update the expected results of the test case.  I'll let
Segher and/or Ke Wen comment though.

[Bug testsuite/115262] [15 regression] gcc.target/powerpc/pr66144-3.c fails after r15-831-g05daf617ea22e1

[linkw at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115262

--- Comment #3 from Kewen Lin <linkw at gcc dot gnu.org> ---
(In reply to Peter Bergner from comment #2)
> (In reply to Jeffrey A. Law from comment #1)
> > It looks like the test wants to see xxsel, but after that change we get
> > xxlor and  what looks like a slight difference in register allocation.  I
> > can't really judge if the new code is better, worse is equivalent.
> 
> xxsel XT,XA,XB,XC computes XT = (XA & ~XC) | (XB & XC).  Using De Morgan's
> law given XB == XC, that seems to simplify to XT = XA | XB which is what
> you're producing and an xxlor (a simple logical or) is not going to be
> slower than a xxsel and is probably faster.  I agree with Bill that this
> looks like an example of needing to update the expected results of the test
> case.  I'll let Segher and/or Ke Wen comment though.

I agree they are equivalent here, from the scheduling descriptions, xxsel and
xxlor are in the same unit.

[Bug testsuite/115262] [15 regression] gcc.target/powerpc/pr66144-3.c fails after r15-831-g05daf617ea22e1

[bergner at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115262

Peter Bergner <bergner at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                URL|                            |https://gcc.gnu.org/piperma
                   |                            |il/gcc-patches/2024-June/65
                   |                            |4397.html
             Status|NEW                         |ASSIGNED
           Assignee|unassigned at gcc dot gnu.org      |bergner at gcc dot gnu.org

[Bug testsuite/115262] [15 regression] gcc.target/powerpc/pr66144-3.c fails after r15-831-g05daf617ea22e1

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115262

--- Comment #4 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Peter Bergner <bergner@gcc.gnu.org>:

https://gcc.gnu.org/g:ae8103a3a13ac412b9ca33222594cb507ceac9f7

commit r15-1232-gae8103a3a13ac412b9ca33222594cb507ceac9f7
Author: Peter Bergner <bergner@linux.ibm.com>
Date:   Wed Jun 12 21:05:34 2024 -0500

    rs6000: Fix pr66144-3.c test to accept multiple equivalent insns.
[PR115262]

    Jeff's commit r15-831-g05daf617ea22e1 changed the instruction we expected
    for this test case into an equivalent instruction.  Modify the test case
    so it will accept any of three instructions we could get depending on the
    options used.

    2024-06-12  Peter Bergner  <bergner@linux.ibm.com>

    gcc/testsuite/
            PR testsuite/115262
            * gcc.target/powerpc/pr66144-3.c (dg-do): Compile for all targets.
            (dg-options): Add -fno-unroll-loops and remove -mvsx.
            (scan-assembler): Change from this...
            (scan-assembler-times): ...to this.  Tweak regex to accept multiple
            allowable instructions.

[Bug testsuite/115262] [15 regression] gcc.target/powerpc/pr66144-3.c fails after r15-831-g05daf617ea22e1

[bergner at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115262

Peter Bergner <bergner at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|ASSIGNED                    |RESOLVED
         Resolution|---                         |FIXED
      Known to fail|                            |15.0

--- Comment #5 from Peter Bergner <bergner at gcc dot gnu.org> ---
Fixed.