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From: "linkw at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug testsuite/115262] [15 regression]
 gcc.target/powerpc/pr66144-3.c  fails after r15-831-g05daf617ea22e1
Date: Wed, 12 Jun 2024 02:39:25 +0000
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https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D115262

--- Comment #3 from Kewen Lin <linkw at gcc dot gnu.org> ---
(In reply to Peter Bergner from comment #2)
> (In reply to Jeffrey A. Law from comment #1)
> > It looks like the test wants to see xxsel, but after that change we get
> > xxlor and  what looks like a slight difference in register allocation. =
 I
> > can't really judge if the new code is better, worse is equivalent.
>=20
> xxsel XT,XA,XB,XC computes XT =3D (XA & ~XC) | (XB & XC).  Using De Morga=
n's
> law given XB =3D=3D XC, that seems to simplify to XT =3D XA | XB which is=
 what
> you're producing and an xxlor (a simple logical or) is not going to be
> slower than a xxsel and is probably faster.  I agree with Bill that this
> looks like an example of needing to update the expected results of the te=
st
> case.  I'll let Segher and/or Ke Wen comment though.

I agree they are equivalent here, from the scheduling descriptions, xxsel a=
nd
xxlor are in the same unit.=