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From: "sh.chiang04 at gmail dot com" <gcc-bugzilla@gcc.gnu.org> To: gcc-bugs@gcc.gnu.org Subject: [Bug target/115456] RISC-V: ICE: unrecognizable insn with march=rv64gcv_zvfhmin Date: Thu, 13 Jun 2024 13:30:50 +0000 [thread overview] Message-ID: <bug-115456-4-GV949Nhkrt@http.gcc.gnu.org/bugzilla/> (raw) In-Reply-To: <bug-115456-4@http.gcc.gnu.org/bugzilla/> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115456 --- Comment #4 from Monk Chiang <sh.chiang04 at gmail dot com> --- The test case, if add this option: -mrvv-vector-bits=zvl It has a new internal compiler error. compress_run-2.c:25:1: error: unrecognizable insn: 25 | } | ^ (insn 30 29 31 2 (set (reg:HF 156 [ _2 ]) (unspec:HF [ (vec_select:HF (reg:RVVMF2HF 134 [ _1 ]) (parallel [ (const_int 0 [0]) ])) (reg:SI 67 vtype) ] UNSPEC_VPREDICATE)) "compress_run-2.c":22:3 -1 (nil)) during RTL pass: vregs compress_run-2.c:25:1: internal compiler error: in extract_insn, at recog.cc:2812 0xb3bc47 _fatal_insn(char const*, rtx_def const*, char const*, int, char const*) ../../../gcc/gcc/rtl-error.cc:108 0xb3bc69 _fatal_insn_not_found(rtx_def const*, char const*, int, char const*) ../../../gcc/gcc/rtl-error.cc:116 0xb3a545 extract_insn(rtx_insn*) ../../../gcc/gcc/recog.cc:2812 0x1010e9e instantiate_virtual_regs_in_insn ../../../gcc/gcc/function.cc:1612 0x1010e9e instantiate_virtual_regs ../../../gcc/gcc/function.cc:1995 0x1010e9e execute ../../../gcc/gcc/function.cc:2042
next prev parent reply other threads:[~2024-06-13 13:30 UTC|newest] Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top 2024-06-12 7:48 [Bug c/115456] New: " sh.chiang04 at gmail dot com 2024-06-12 14:46 ` [Bug target/115456] RISC-V: " pan2.li at intel dot com 2024-06-13 4:32 ` pan2.li at intel dot com 2024-06-13 9:46 ` cvs-commit at gcc dot gnu.org 2024-06-13 13:30 ` sh.chiang04 at gmail dot com [this message] 2024-06-14 7:56 ` cvs-commit at gcc dot gnu.org
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