[Bug target/115464] New: ICE when building libaom on arm64

[Bug target/115464] New: ICE when building libaom on arm64

[sjames at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115464

            Bug ID: 115464
           Summary: ICE when building libaom on arm64
           Product: gcc
           Version: unknown
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: sjames at gcc dot gnu.org
  Target Milestone: ---

```
# gcc -c highbd_convolve_sve2.c.i -fpermissive -march=armv9-a+sve2 -O
during RTL pass: expand
highbd_convolve_sve2.c.i: In function ‘convolve4_4_x’:
highbd_convolve_sve2.c.i:10:7: internal compiler error: in
paradoxical_subreg_p, at rtl.h:3213
   10 |       svget_neonq_s16(svtbl_s16(svset_neonq_s16(svundef_s16(),
aom_tbl_s16_s),
      |      
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   11 |                                 svset_neonq_u16(svundef_u16(), tbl)));
      |                                 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
0xaaaacefc611f paradoxical_subreg_p(machine_mode, machine_mode)
        /usr/src/debug/sys-devel/gcc-15.0.9999/gcc-15.0.9999/gcc/rtl.h:3213
0xaaaacefc611f simplify_context::simplify_subreg(machine_mode, rtx_def*,
machine_mode, poly_int<2u, unsigned long>)
       
/usr/src/debug/sys-devel/gcc-15.0.9999/gcc-15.0.9999/gcc/simplify-rtx.cc:7751
0xaaaacefcefeb simplify_context::simplify_gen_subreg(machine_mode, rtx_def*,
machine_mode, poly_int<2u, unsigned long>)
       
/usr/src/debug/sys-devel/gcc-15.0.9999/gcc-15.0.9999/gcc/simplify-rtx.cc:7998
0xaaaacf667d1b simplify_gen_subreg(machine_mode, rtx_def*, machine_mode,
poly_int<2u, unsigned long>)
        /usr/src/debug/sys-devel/gcc-15.0.9999/gcc-15.0.9999/gcc/rtl.h:3552
0xaaaacf667d1b expand
       
/usr/src/debug/sys-devel/gcc-15.0.9999/gcc-15.0.9999/gcc/config/aarch64/aarch64-sve-builtins-base.cc:1177
0xaaaacf64d2eb aarch64_sve::expand_builtin(unsigned int, tree_node*, rtx_def*)
       
/usr/src/debug/sys-devel/gcc-15.0.9999/gcc-15.0.9999/gcc/config/aarch64/aarch64-sve-builtins.cc:4790
0xaaaacea1e7af expand_expr_real_1(tree_node*, rtx_def*, machine_mode,
expand_modifier, rtx_def**, bool)
        /usr/src/debug/sys-devel/gcc-15.0.9999/gcc-15.0.9999/gcc/expr.cc:12357
0xaaaacea33c23 expand_expr_real(tree_node*, rtx_def*, machine_mode,
expand_modifier, rtx_def**, bool)
        /usr/src/debug/sys-devel/gcc-15.0.9999/gcc-15.0.9999/gcc/expr.cc:9447
0xaaaacea33c23 store_expr(tree_node*, rtx_def*, int, bool, bool)
        /usr/src/debug/sys-devel/gcc-15.0.9999/gcc-15.0.9999/gcc/expr.cc:6747
0xaaaacea3b587 expand_assignment(tree_node*, tree_node*, bool)
        /usr/src/debug/sys-devel/gcc-15.0.9999/gcc-15.0.9999/gcc/expr.cc:6468
0xaaaacea3b587 expand_assignment(tree_node*, tree_node*, bool)
        /usr/src/debug/sys-devel/gcc-15.0.9999/gcc-15.0.9999/gcc/expr.cc:5953
0xaaaace86cf97 expand_call_stmt
       
/usr/src/debug/sys-devel/gcc-15.0.9999/gcc-15.0.9999/gcc/cfgexpand.cc:2893
0xaaaace86cf97 expand_gimple_stmt_1
       
/usr/src/debug/sys-devel/gcc-15.0.9999/gcc-15.0.9999/gcc/cfgexpand.cc:3962
0xaaaace86cf97 expand_gimple_stmt
       
/usr/src/debug/sys-devel/gcc-15.0.9999/gcc-15.0.9999/gcc/cfgexpand.cc:4104
0xaaaace87586f expand_gimple_basic_block
       
/usr/src/debug/sys-devel/gcc-15.0.9999/gcc-15.0.9999/gcc/cfgexpand.cc:6160
0xaaaace877da7 execute
       
/usr/src/debug/sys-devel/gcc-15.0.9999/gcc-15.0.9999/gcc/cfgexpand.cc:6899
Please submit a full bug report, with preprocessed source (by using
-freport-bug).
Please include the complete backtrace with any bug report.
See <https://bugs.gentoo.org/> for instructions.
```

---

Using built-in specs.
COLLECT_GCC=gcc
COLLECT_LTO_WRAPPER=/usr/libexec/gcc/aarch64-unknown-linux-gnu/15/lto-wrapper
Target: aarch64-unknown-linux-gnu
Configured with:
/var/tmp/portage/sys-devel/gcc-15.0.9999/work/gcc-15.0.9999/configure
--host=aarch64-unknown-linux-gnu --build=aarch64-unknown-linux-gnu
--prefix=/usr --bindir=/usr/aarch64-unknown-linux-gnu/gcc-bin/15
--includedir=/usr/lib/gcc/aarch64-unknown-linux-gnu/15/include
--datadir=/usr/share/gcc-data/aarch64-unknown-linux-gnu/15
--mandir=/usr/share/gcc-data/aarch64-unknown-linux-gnu/15/man
--infodir=/usr/share/gcc-data/aarch64-unknown-linux-gnu/15/info
--with-gxx-include-dir=/usr/lib/gcc/aarch64-unknown-linux-gnu/15/include/g++-v15
--disable-silent-rules --disable-dependency-tracking
--with-python-dir=/share/gcc-data/aarch64-unknown-linux-gnu/15/python
--enable-languages=c,c++,fortran --enable-obsolete --enable-secureplt
--disable-werror --with-system-zlib --enable-nls --without-included-gettext
--disable-libunwind-exceptions --enable-checking=yes,extra,rtl
--with-bugurl=https://bugs.gentoo.org/ --with-pkgversion='Gentoo Hardened
15.0.9999 p, commit c8bf41759fe849050fcb5c5105483c9db6b15da2'
--with-gcc-major-version-only --enable-libstdcxx-time --enable-lto
--disable-libstdcxx-pch --enable-shared --enable-threads=posix
--enable-__cxa_atexit --enable-clocale=gnu --disable-multilib
--disable-fixed-point --enable-libgomp --disable-libssp --disable-libada
--disable-standard-branch-protection --disable-systemtap
--disable-valgrind-annotations --disable-vtable-verify --disable-libvtv
--with-zstd --without-isl --enable-default-pie --enable-host-pie
--enable-host-bind-now --enable-default-ssp --disable-fixincludes
--with-build-config=bootstrap-O3
Thread model: posix
Supported LTO compression algorithms: zlib zstd
gcc version 15.0.0 20240611 (experimental)
95161c6abfbd7ba9fab0b538ccc885f5980efbee (Gentoo Hardened 15.0.9999 p, commit
c8bf41759fe849050fcb5c5105483c9db6b15da2)

[Bug target/115464] ICE when building libaom on arm64

[sjames at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115464

--- Comment #1 from Sam James <sjames at gcc dot gnu.org> ---
Created attachment 58414
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=58414&action=edit
highbd_convolve_sve2.c.i.xz

[Bug target/115464] ICE when building libaom on arm64

[sjames at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115464

--- Comment #2 from Sam James <sjames at gcc dot gnu.org> ---
Reduced:
```
#pragma GCC aarch64 "arm_neon.h"
typedef __Int16x8_t int16x8_t;
typedef __Uint16x8_t uint16x8_t;
#pragma GCC aarch64 "arm_sve.h"
#pragma GCC aarch64 "arm_neon_sve_bridge.h"
int16x8_t aom_tbl_s16_s, convolve4_4_x___trans_tmp_2;
int convolve4_4_x(uint16x8x2_t permute_tbl) {
uint16x8_t tbl = permute_tbl.val[1];
convolve4_4_x___trans_tmp_2 =
svget_neonq_s16(svtbl_s16(svset_neonq_s16(svundef_s16(), aom_tbl_s16_s),
svset_neonq_u16(svundef_u16(), tbl)));
}
```

[Bug target/115464] ICE when building libaom on arm64 (neon sve bridge usage with tbl/perm)

[tnfchris at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115464

Tamar Christina <tnfchris at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Last reconfirmed|                            |2024-06-12
                 CC|                            |tnfchris at gcc dot gnu.org
             Status|UNCONFIRMED                 |NEW
     Ever confirmed|0                           |1

--- Comment #3 from Tamar Christina <tnfchris at gcc dot gnu.org> ---
Confirmed, slightly more cleaned up example:

#include <arm_neon.h>
#include <arm_sve.h>
#include <arm_neon_sve_bridge.h>

int16x8_t
convolve4_4_x (uint16x8x2_t permute_tbl, svint16_t res)
{
    return svget_neonq_s16 (
        svtbl_s16 (res,
                   svset_neonq_u16 (svundef_u16 (), permute_tbl.val[0])));
}

[Bug target/115464] ICE when building libaom on arm64 (neon sve bridge usage with tbl/perm)

[tnfchris at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115464

Tamar Christina <tnfchris at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |rsandifo at gcc dot gnu.org

--- Comment #4 from Tamar Christina <tnfchris at gcc dot gnu.org> ---
Looks like the Neon lowpart optimization doesn't take into account aggregate
vectors.

That means simplest reproduction is:

#include <arm_neon.h>
#include <arm_sve.h>
#include <arm_neon_sve_bridge.h>

svuint16_t
convolve4_4_x (uint16x8x2_t permute_tbl)
{
    return svset_neonq_u16 (svundef_u16 (), permute_tbl.val[1]);
}

This generates a subreg between from E_V2x8HImode to E_VNx8HImode.

This subreg is an invalid paradoxical subreg as there's no strict ordered
relationship between the modes.

This fails because ordered_p does not have a relationship defined between a
poly vector
and an aggregate non-poly vector.

I think one should probably be provided, essentially the NEON<->SVE bridge is
broken for aggregate types in general at the moment.  I don't know the exact
semantics for poly-ints.

I tried patching ordered_p but the ICE just moves. Any thoughts Richard?

[Bug target/115464] ICE when building libaom on arm64 (neon sve bridge usage with tbl/perm)

[rsandifo at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115464

Richard Sandiford <rsandifo at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Assignee|unassigned at gcc dot gnu.org      |rsandifo at gcc dot gnu.org
             Status|NEW                         |ASSIGNED

--- Comment #5 from Richard Sandiford <rsandifo at gcc dot gnu.org> ---
In this kind of situation, we should go through a fresh pseudo rather than try
to take the subreg directly.

[Bug target/115464] ICE when building libaom on arm64 (neon sve bridge usage with tbl/perm)

[tnfchris at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115464

--- Comment #6 from Tamar Christina <tnfchris at gcc dot gnu.org> ---
(In reply to Richard Sandiford from comment #5)
> In this kind of situation, we should go through a fresh pseudo rather than
> try to take the subreg directly.

I did try that but fwprop pushed it back in.

[Bug target/115464] ICE when building libaom on arm64 (neon sve bridge usage with tbl/perm)

[tnfchris at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115464

--- Comment #7 from Tamar Christina <tnfchris at gcc dot gnu.org> ---
(In reply to Tamar Christina from comment #6)
> (In reply to Richard Sandiford from comment #5)
> > In this kind of situation, we should go through a fresh pseudo rather than
> > try to take the subreg directly.
> 
> I did try that but fwprop pushed it back in.

Ahh no, I used force_reg, doh.. Fair.

[Bug target/115464] ICE when building libaom on arm64 (neon sve bridge usage with tbl/perm)

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115464

--- Comment #8 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The trunk branch has been updated by Richard Sandiford <rsandifo@gcc.gnu.org>:

https://gcc.gnu.org/g:0970ff46ba6330fc80e8736fc05b2eaeeae0b6a0

commit r15-1244-g0970ff46ba6330fc80e8736fc05b2eaeeae0b6a0
Author: Richard Sandiford <richard.sandiford@arm.com>
Date:   Thu Jun 13 12:48:21 2024 +0100

    aarch64: Fix invalid nested subregs [PR115464]

    The testcase extracts one arm_neon.h vector from a pair (one subreg)
    and then reinterprets the result as an SVE vector (another subreg).
    Each subreg makes sense individually, but we can't fold them together
    into a single subreg: it's 32 bytes -> 16 bytes -> 16*N bytes,
    but the interpretation of 32 bytes -> 16*N bytes depends on
    whether N==1 or N>1.

    Since the second subreg makes sense individually, simplify_subreg
    should bail out rather than ICE on it.  simplify_gen_subreg will
    then do the same (because it already checks validate_subreg).
    This leaves simplify_gen_subreg returning null, requiring the
    caller to take appropriate action.

    I think this is relatively likely to occur elsewhere, so the patch
    adds a helper for forcing a subreg, allowing a temporary pseudo to
    be created where necessary.

    I'll follow up by using force_subreg in more places.  This patch
    is intended to be a minimal backportable fix for the PR.

    gcc/
            PR target/115464
            * simplify-rtx.cc (simplify_context::simplify_subreg): Don't try
            to fold two subregs together if their relationship isn't known
            at compile time.
            * explow.h (force_subreg): Declare.
            * explow.cc (force_subreg): New function.
            * config/aarch64/aarch64-sve-builtins-base.cc
            (svset_neonq_impl::expand): Use it instead of simplify_gen_subreg.

    gcc/testsuite/
            PR target/115464
            * gcc.target/aarch64/sve/acle/general/pr115464.c: New test.

[Bug target/115464] [14 Backport] ICE when building libaom on arm64 (neon sve bridge usage with tbl/perm)

[rsandifo at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115464

Richard Sandiford <rsandifo at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
      Known to work|                            |15.0
      Known to fail|                            |14.1.0
            Summary|ICE when building libaom on |[14 Backport] ICE when
                   |arm64 (neon sve bridge      |building libaom on arm64
                   |usage with tbl/perm)        |(neon sve bridge usage with
                   |                            |tbl/perm)

--- Comment #9 from Richard Sandiford <rsandifo at gcc dot gnu.org> ---
Fixed on trunk.  Will backport to GCC 14 if there is no fallout.

[Bug target/115464] [14 Backport] ICE when building libaom on arm64 (neon sve bridge usage with tbl/perm)

[tnfchris at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115464

--- Comment #10 from Tamar Christina <tnfchris at gcc dot gnu.org> ---
Thanks for the fix, but I don't think it's sufficient.

what I meant with the earlier comment was that the subregs are broken in
general, so not just the one generated by the undef fast path.

i.e.

#include <arm_neon.h>
#include <arm_sve.h>
#include <arm_neon_sve_bridge.h>

svuint16_t
convolve4_4_x (uint16x8x2_t permute_tbl, svuint16_t a)
{
    return svset_neonq_u16 (a, permute_tbl.val[1]);
}

seems to still ICE for me because it goes into the general expander which
produces the same subreg.

[Bug target/115464] [14 Backport] ICE when building libaom on arm64 (neon sve bridge usage with tbl/perm)

[rsandifo at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115464

--- Comment #11 from Richard Sandiford <rsandifo at gcc dot gnu.org> ---
Yeah, like I mentioned in the commit message, I'm in the process of rolling
this fix out to more places.  Was just testing the waters with the minimal fix
for comment 4.

But yeah, maybe more of it will need to be backported than I'd hoped.

[Bug target/115464] [14 Backport] ICE when building libaom on arm64 (neon sve bridge usage with tbl/perm)

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115464

--- Comment #12 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The trunk branch has been updated by Richard Sandiford <rsandifo@gcc.gnu.org>:

https://gcc.gnu.org/g:6bd4fbae45d11795a9a6f54b866308d4d7134def

commit r15-1399-g6bd4fbae45d11795a9a6f54b866308d4d7134def
Author: Richard Sandiford <richard.sandiford@arm.com>
Date:   Tue Jun 18 12:22:31 2024 +0100

    aarch64: Add some uses of force_lowpart_subreg

    This patch makes more use of force_lowpart_subreg, similarly
    to the recent patch for force_subreg.  The criteria were:

    (1) The code is obviously specific to expand (where new pseudos
        can be created).

    (2) The value is obviously an rvalue rather than an lvalue.

    gcc/
            PR target/115464
            * config/aarch64/aarch64-builtins.cc (aarch64_expand_fcmla_builtin)
            (aarch64_expand_rwsr_builtin): Use force_lowpart_subreg instead of
            simplify_gen_subreg and lowpart_subreg.
            * config/aarch64/aarch64-sve-builtins-base.cc
            (svset_neonq_impl::expand): Likewise.
            * config/aarch64/aarch64-sve-builtins-sme.cc
            (add_load_store_slice_operand): Likewise.
            * config/aarch64/aarch64.cc (aarch64_sve_reinterpret): Likewise.
            (aarch64_addti_scratch_regs, aarch64_subvti_scratch_regs):
Likewise.

    gcc/testsuite/
            PR target/115464
            * gcc.target/aarch64/sve/acle/general/pr115464_2.c: New test.