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From: "palmer at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/115687] RISC-V optimization when "lui" instructions can be merged
Date: Thu, 27 Jun 2024 18:49:38 +0000	[thread overview]
Message-ID: <bug-115687-4-Pd0JVAEPFl@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-115687-4@http.gcc.gnu.org/bugzilla/>

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115687

--- Comment #4 from palmer at gcc dot gnu.org ---
Just poking around a bit: I think this is coming from CSE, which is replacing

(insn 5 2 6 2 (set (reg:DI 135)
        (const_int 16384 [0x4000])) "pr115687.c":7:12 275 {*movdi_64bit}
     (nil))
(insn 6 5 7 2 (set (reg:DI 12 a2)
        (plus:DI (reg:DI 135)
            (const_int -16 [0xfffffffffffffff0]))) "pr115687.c":7:12 5 {adddi3}
     (expr_list:REG_EQUAL (const_int 16368 [0x3ff0])
        (nil)))
(insn 7 6 8 2 (set (reg:DI 136)
        (const_int 16384 [0x4000])) "pr115687.c":7:12 275 {*movdi_64bit}
     (nil))
(insn 8 7 9 2 (set (reg:DI 11 a1)
        (plus:DI (reg:DI 136)
            (const_int 32 [0x20]))) "pr115687.c":7:12 5 {adddi3}
     (expr_list:REG_EQUAL (const_int 16416 [0x4020])
        (nil)))
(insn 9 8 10 2 (set (reg:DI 137)
        (const_int 16384 [0x4000])) "pr115687.c":7:12 275 {*movdi_64bit}
     (nil))

with

(insn 5 2 6 2 (set (reg:DI 135)
        (const_int 16384 [0x4000])) "pr115687.c":7:12 275 {*movdi_64bit}
     (nil))
(insn 6 5 7 2 (set (reg:DI 12 a2)
        (const_int 16368 [0x3ff0])) "pr115687.c":7:12 273 {*mvconst_internal}
     (expr_list:REG_DEAD (reg:DI 135)
        (expr_list:REG_EQUAL (const_int 16368 [0x3ff0])
            (nil))))
(insn 7 6 8 2 (set (reg:DI 136)
        (reg:DI 135)) "pr115687.c":7:12 275 {*movdi_64bit}
     (expr_list:REG_EQUAL (const_int 16384 [0x4000])
        (nil)))
(insn 8 7 9 2 (set (reg:DI 11 a1)
        (const_int 16416 [0x4020])) "pr115687.c":7:12 273 {*mvconst_internal}
     (expr_list:REG_DEAD (reg:DI 136)
        (expr_list:REG_EQUAL (const_int 16416 [0x4020])
            (nil))))
(insn 9 8 10 2 (set (reg:DI 137)
        (reg:DI 135)) "pr115687.c":7:12 275 {*movdi_64bit}
     (expr_list:REG_EQUAL (const_int 16384 [0x4000])
        (nil)))
(insn 10 9 11 2 (set (reg:DI 10 a0)
        (const_int 16400 [0x4010])) "pr115687.c":7:12 273 {*mvconst_internal}
     (expr_list:REG_DEAD (reg:DI 137)
        (expr_list:REG_EQUAL (const_int 16400 [0x4010])
            (nil))))

that seems to be as-designed -- or at least as this comment in cse.cc seems to
be describing

          /* Find cheapest and skip it for the next time.   For items
             of equal cost, use this order:
             src_folded, src, src_eqv, src_related and hash table entry.  */

That seems like a bit of a heuristic, but I haven't poked around this stuff to
really understand how it's handling multiple uses of the incoming constant
anchor.

  parent reply	other threads:[~2024-06-27 18:49 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-27 17:51 [Bug other/115687] New: " Explorer09 at gmail dot com
2024-06-27 18:17 ` [Bug target/115687] " palmer at gcc dot gnu.org
2024-06-27 18:30 ` pinskia at gcc dot gnu.org
2024-06-27 18:32 ` pinskia at gcc dot gnu.org
2024-06-27 18:49 ` palmer at gcc dot gnu.org [this message]
2024-06-27 18:54 ` palmer at gcc dot gnu.org
2024-06-27 20:39 ` andrew at sifive dot com
2024-06-27 21:02 ` vineetg at gcc dot gnu.org
2024-06-27 21:57 ` palmer at gcc dot gnu.org

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