[Bug target/115688] [15 regression] ICE on simple test case from r15-703-gb390b011569635

["linkw at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=115688

--- Comment #2 from Kewen Lin <linkw at gcc dot gnu.org> ---
The assertion does expose an inconsistent combination !TARGET_ALTIVEC but
TARGET_VSX wiht 32-bit target attribute -mvsx.  There is one special handling
for altivec_abi:

  /* Disable VSX and Altivec silently if the user switched cpus to power7 in a
     target attribute or pragma which automatically enables both options,
     unless the altivec ABI was set.  This is set by default for 64-bit, but
     not for 32-bit.  Don't move this before the above code using ignore_masks,
     since it can reset the cleared VSX/ALTIVEC flag again.  */
  if (main_target_opt && !main_target_opt->x_rs6000_altivec_abi)
    rs6000_isa_flags &= ~((OPTION_MASK_VSX | OPTION_MASK_ALTIVEC)
                          & ~rs6000_isa_flags_explicit);

// 32 bit has altivec_abi unset, so that's why it doesn't ICE at -m64.

It would mask off altivec and vsx flag bit if they are not specified explicitly
for 32-bit (which has altivec_abi unset). For the given case, vsx is explicitly
specified, altivec is implicitly enabled as it's part of ISA_2_6_MASKS_SERVER.
When hitting the above hunk, vsx is kept as it's explicitly enabled but altivec
gets masked off. Then it results in an unexpected status that we have vsx but
not altivec. The fix looks to guard altivec masking off by checking if vsx is
explicitly specified.

diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index cd14e5a34ed..a8a3b79dda0 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -3925,8 +3925,12 @@ rs6000_option_override_internal (bool global_init_p)
      not for 32-bit.  Don't move this before the above code using
ignore_masks,
      since it can reset the cleared VSX/ALTIVEC flag again.  */
   if (main_target_opt && !main_target_opt->x_rs6000_altivec_abi)
-    rs6000_isa_flags &= ~((OPTION_MASK_VSX | OPTION_MASK_ALTIVEC)
-                          & ~rs6000_isa_flags_explicit);
+    {
+      rs6000_isa_flags &= ~(OPTION_MASK_VSX & ~rs6000_isa_flags_explicit);
+      /* Don't mask off ALTIVEC if it is enabled by an explicit VSX.  */
+      if (!TARGET_VSX || !(rs6000_isa_flags_explicit & OPTION_MASK_VSX))
+        rs6000_isa_flags &= ~(OPTION_MASK_ALTIVEC &
~rs6000_isa_flags_explicit);
+    }

   if (TARGET_CRYPTO && !TARGET_ALTIVEC)
     {