[Bug target/116274] [14/15 Regression] x86: poor code generation with 16 byte function arguments and addition

["cvs-commit at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116274

--- Comment #7 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by hongtao Liu <liuhongt@gcc.gnu.org>:

https://gcc.gnu.org/g:f7e672da8fc3d416a6d07eb01f3be4400ef94fac

commit r15-2930-gf7e672da8fc3d416a6d07eb01f3be4400ef94fac
Author: liuhongt <hongtao.liu@intel.com>
Date:   Mon Aug 12 18:24:34 2024 +0800

    Movement between GENERAL_REGS and SSE_REGS for TImode doesn't need
secondary reload.

    It results in 2 failures for x86_64-pc-linux-gnu{\
    -march=cascadelake};

    gcc: gcc.target/i386/extendditi3-1.c scan-assembler cqt?o
    gcc: gcc.target/i386/pr113560.c scan-assembler-times \tmulq 1

    For pr113560.c, now GCC generates mulx instead of mulq with
    -march=cascadelake, which should be optimal, so adjust testcase for
    that.
    For gcc.target/i386/extendditi2-1.c, RA happens to choose another
    register instead of rax and result in

            movq    %rdi, %rbp
            movq    %rdi, %rax
            sarq    $63, %rbp
            movq    %rbp, %rdx

    The patch adds a new define_peephole2 for that.

    gcc/ChangeLog:

            PR target/116274
            * config/i386/i386-expand.cc (ix86_expand_vector_move):
            Restrict special case TImode to 128-bit vector conversions via
            V2DI under ix86_pre_reload_split ().
            * config/i386/i386.cc (inline_secondary_memory_needed):
            Movement between GENERAL_REGS and SSE_REGS for TImode doesn't
            need secondary reload.
            * config/i386/i386.md (*extendsidi2_rex64): Add a
            define_peephole2 after it.

    gcc/testsuite/ChangeLog:

            * gcc.target/i386/pr116274.c: New test.
            * gcc.target/i386/pr113560.c: Scan either mulq or mulx.