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From: "cvs-commit at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org> To: gcc-bugs@gcc.gnu.org Subject: [Bug target/116275] [15 regression] ICE when building llvm-18.1.8 (convert_insn, at config/i386/i386-features.cc:1502) Date: Mon, 12 Aug 2024 05:54:48 +0000 [thread overview] Message-ID: <bug-116275-4-jPviOnvow0@http.gcc.gnu.org/bugzilla/> (raw) In-Reply-To: <bug-116275-4@http.gcc.gnu.org/bugzilla/> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116275 --- Comment #6 from GCC Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Roger Sayle <sayle@gcc.gnu.org>: https://gcc.gnu.org/g:7a970bd03f1d8eed7703db8a8db3c753ea68899f commit r15-2880-g7a970bd03f1d8eed7703db8a8db3c753ea68899f Author: Roger Sayle <roger@nextmovesoftware.com> Date: Mon Aug 12 06:52:48 2024 +0100 PR target/116275: Handle STV of *extenddi2_doubleword_highpart on i386. This patch resolves PR target/116275, a recent ICE-on-valid regression on -m32 caused by my recent change to enable STV of DImode arithmeric right shift on non-AVX512VL targets. The oversight is that the i386 backend contains an *extenddi2_doubleword_highpart instruction (whose pattern is an arithmetic right shift of a left shift) that optimizes the case where sign-extension need only update the highpart word of a DImode value when generating 32-bit code (!TARGET_64BIT). STV accepts this pattern as a candidate, as there are patterns to handle this form of extension on SSE using AVX512VL instructions (and previously ASHIFTRT was only allowed on AVX512VL). Now that ASHIFTRT is a candidate on non-AVX512vL targets, we either need to check that the first operand is a register, or as done below provide the define_insn_and_split that provides a non-AVX512VL implementation of *extendv2di_highpart_stv. The new testcase only ICEed with -m32, so this test could be limited to target ia32, but there's no harm also running this test on -m64 to provide a little extra test coverage. 2024-08-12 Roger Sayle <roger@nextmovesoftware.com> gcc/ChangeLog PR target/116275 * config/i386/i386.md (*extendv2di2_highpart_stv_noavx512vl): New define_insn_and_split to handle the STV conversion of the DImode pattern *extendsi2_doubleword_highpart. gcc/testsuite/ChangeLog PR target/116275 * g++.target/i386/pr116275.C: New test case.
next prev parent reply other threads:[~2024-08-12 5:54 UTC|newest] Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top 2024-08-07 19:57 [Bug target/116275] New: " sjames at gcc dot gnu.org 2024-08-07 21:16 ` [Bug target/116275] " roger at nextmovesoftware dot com 2024-08-08 0:57 ` sjames at gcc dot gnu.org 2024-08-08 6:28 ` sjames at gcc dot gnu.org 2024-08-08 10:42 ` roger at nextmovesoftware dot com 2024-08-08 10:52 ` sjames at gcc dot gnu.org 2024-08-12 5:54 ` cvs-commit at gcc dot gnu.org [this message] 2024-08-15 21:05 ` cvs-commit at gcc dot gnu.org 2024-08-18 18:57 ` sjames at gcc dot gnu.org
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