[Bug c++/116484] New: Allow constexpr expression in riscv_rvv_vector_bits attribute

[Bug c++/116484] New: Allow constexpr expression in riscv_rvv_vector_bits attribute

[sergesanspaille at free dot fr]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116484

            Bug ID: 116484
           Summary: Allow constexpr expression in riscv_rvv_vector_bits
                    attribute
           Product: gcc
           Version: unknown
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: c++
          Assignee: unassigned at gcc dot gnu.org
          Reporter: sergesanspaille at free dot fr
  Target Milestone: ---

The following code:

```
#include <riscv_vector.h>
constexpr unsigned size = 1024;
using type = vint8m8_t __attribute__((riscv_rvv_vector_bits(size)));
```

compiles fine with clang but fails with gcc (see
https://godbolt.org/z/jvn6E4oPe), as gcc expect an integer constant as
riscv_rvv_vector_bits parameter. It would be nice to have gcc support this too.

[Bug c++/116484] Allow constexpr expression in riscv_rvv_vector_bits attribute

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116484

--- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
This attribute is not documented so ...

[Bug target/116484] Allow constexpr expression in riscv_rvv_vector_bits attribute

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116484

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           See Also|                            |https://github.com/riscv-no
                   |                            |n-isa/rvv-intrinsic-doc/iss
                   |                            |ues/176

--- Comment #2 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
The full documentation in the RVV documentation is not done so ....

[Bug target/116484] Allow constexpr expression in riscv_rvv_vector_bits attribute and arm_sve_vector_bits

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116484

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Last reconfirmed|                            |2024-08-26
             Status|UNCONFIRMED                 |NEW
            Summary|Allow constexpr expression  |Allow constexpr expression
                   |in riscv_rvv_vector_bits    |in riscv_rvv_vector_bits
                   |attribute                   |attribute and
                   |                            |arm_sve_vector_bits
     Ever confirmed|0                           |1

--- Comment #3 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Looks like arm_sve_vector_bits will have the same issue.

The way the standard attribute allows constexpr, etc to work is to use
default_conversion .
e.g.:
  if (size && TREE_CODE (size) != IDENTIFIER_NODE
      && TREE_CODE (size) != FUNCTION_DECL)
    size = default_conversion (size);

But default_conversion is only available from the C family frontends. Looks
like a lang-hook is needed here ...

[Bug target/116484] Allow constexpr expression in riscv_rvv_vector_bits attribute and arm_sve_vector_bits

[sayhappy at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116484

J Lee <sayhappy at gmail dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |sayhappy at gmail dot com

--- Comment #4 from J Lee <sayhappy at gmail dot com> ---

Is this error also related to the same 'const' issue?


error: no matching function for call to '__riscv_vreinterpret_u8m8(const
__rvv_uint8m8_t&)'

note: candidate: 'vuint8m8_t __riscv_vreinterpret_u8m8(vint8m8_t)'


you can see the above error messages on below link,
https://godbolt.org/z/e56ffeTdh

[Bug target/116484] Allow constexpr expression in riscv_rvv_vector_bits attribute and arm_sve_vector_bits

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116484

--- Comment #5 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
(In reply to J Lee from comment #4)
> Is this error also related to the same 'const' issue?

No that is unrelated to this attribute issue.

[Bug target/116484] Allow constexpr expression in riscv_rvv_vector_bits attribute and arm_sve_vector_bits

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116484

--- Comment #6 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
(In reply to Andrew Pinski from comment #5)
> (In reply to J Lee from comment #4)
> > Is this error also related to the same 'const' issue?
> 
> No that is unrelated to this attribute issue.

Well the original error message is. The rest are due to the first error
message.

[Bug target/116484] Allow constexpr expression in riscv_rvv_vector_bits attribute and arm_sve_vector_bits

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116484

--- Comment #7 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
(In reply to Andrew Pinski from comment #6)
> (In reply to Andrew Pinski from comment #5)
> > (In reply to J Lee from comment #4)
> > > Is this error also related to the same 'const' issue?
> > 
> > No that is unrelated to this attribute issue.
> 
> Well the original error message is. The rest are due to the first error
> message.

Except it does have some other error messages:
/opt/compiler-explorer/libs/xsimd/trunk/include/xsimd/types/xsimd_rvv_register.hpp:121:213:
error: explicit specialization in non-namespace scope 'struct
xsimd::types::detail::rvv_type_info<signed char, 1024>'

Which is PR 85282.

So this code won't be supported until that is implemented which seems not any
time soon it looks like.

[Bug target/116484] Allow constexpr expression in riscv_rvv_vector_bits attribute and arm_sve_vector_bits

[sayhappy at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116484

--- Comment #8 from J Lee <sayhappy at gmail dot com> ---
I agree with you, Andrew.
Now, GCC can't be used to build XSIMD at least RISC-V.
I didn't expect getting such quick and helpful comments like this.
Thanks sergesanspaille and Andrew ! :-)