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From: "rguenth at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org> To: gcc-bugs@gcc.gnu.org Subject: [Bug tree-optimization/116583] vectorizable_slp_permutation cannot handle even/odd extract from VLA vector Date: Fri, 20 Sep 2024 09:33:12 +0000 [thread overview] Message-ID: <bug-116583-4-7Um2KgIgZ8@http.gcc.gnu.org/bugzilla/> (raw) In-Reply-To: <bug-116583-4@http.gcc.gnu.org/bugzilla/> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=116583 --- Comment #4 from Richard Biener <rguenth at gcc dot gnu.org> --- So the key to notice here is the regular interleaving knows there's enough vectors to perform two-vector to one permutes within the same group and we only have a single child for the VEC_PERM_EXPR which for the permute in question effectively means we have to take "two" VLA vectors. The non-SLP interleaving scheme for this performs multiple VLA loads while we'd have a contiguous load node that we'd permute later on but we're usually not emitting multiple loads(?). For gcc.dg/vect/slp-42.c we do end up (after re-analyzing with single-lane SLP) with store-lanes for the 4 element store but SVE doesn't support 8 element load-lanes (we could use 4 element load lanes with u64 elements - missing feature). I do think the VLA interleaving scheme we produce is quite inefficient (and the cost modeling agrees and would choose V4SI fixed-size regs).
prev parent reply other threads:[~2024-09-20 9:33 UTC|newest] Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top 2024-09-03 12:37 [Bug tree-optimization/116583] New: " rguenth at gcc dot gnu.org 2024-09-03 12:39 ` [Bug tree-optimization/116583] " rguenth at gcc dot gnu.org 2024-09-20 9:04 ` rguenth at gcc dot gnu.org 2024-09-20 9:09 ` tnfchris at gcc dot gnu.org 2024-09-20 9:33 ` rguenth at gcc dot gnu.org [this message]
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