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From: "roger at nextmovesoftware dot com" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug tree-optimization/20517] bit shift/mask optimization potential
Date: Sun, 27 Jun 2021 23:26:13 +0000 [thread overview]
Message-ID: <bug-20517-4-ZOqxaUsOBl@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-20517-4@http.gcc.gnu.org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=20517
Roger Sayle <roger at nextmovesoftware dot com> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|NEW |RESOLVED
CC| |roger at nextmovesoftware dot com
Resolution|--- |FIXED
Target Milestone|--- |4.6.4
--- Comment #8 from Roger Sayle <roger at nextmovesoftware dot com> ---
GCC generates code without shifts for all the examples in comment #4, since
around version 4.6.4. The "((x&0xf0)>>4) == 1" of the original, is now
canonicalized to "((x>>4)&0xf) == 1" at the tree-level (to minimize the size of
immediate constants). Whether ((x>>C1)&C2)==C3 is more/less efficient than
(x&C4)==C5, where C4=C2<<C1 and C5=C3<<C1, depends upon the target, so this
decision is made in the RTL optimizers, as explained in the PR's comments.
next parent reply other threads:[~2021-06-27 23:26 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <bug-20517-4@http.gcc.gnu.org/bugzilla/>
2021-06-27 23:26 ` roger at nextmovesoftware dot com [this message]
[not found] <bug-20517-9515@http.gcc.gnu.org/bugzilla/>
2006-04-23 18:01 ` pinskia at gcc dot gnu dot org
2010-09-07 21:50 ` zsojka at seznam dot cz
2010-09-08 16:19 ` jakub at gcc dot gnu dot org
2010-09-08 18:10 ` jakub at gcc dot gnu dot org
2010-09-09 17:52 ` zsojka at seznam dot cz
2005-03-17 13:17 [Bug middle-end/20517] New: " Thomas dot Koenig at online dot de
2005-03-17 17:21 ` [Bug tree-optimization/20517] " pinskia at gcc dot gnu dot org
2005-07-23 21:07 ` phython at gcc dot gnu dot org
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