[Bug middle-end/21111] IA-64 NaT consumption faults due to uninitialized register reads

[Bug middle-end/21111] IA-64 NaT consumption faults due to uninitialized register reads

[rguenth at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=21111

Richard Guenther <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Keywords|                            |wrong-code
             Status|UNCONFIRMED                 |WAITING
   Last reconfirmed|                            |2012-01-11
     Ever Confirmed|0                           |1

--- Comment #5 from Richard Guenther <rguenth at gcc dot gnu.org> 2012-01-11 13:04:46 UTC ---
Is this still an issue?

[Bug middle-end/21111] IA-64 NaT consumption faults due to uninitialized register reads

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=21111

--- Comment #17 from Richard Biener <rguenth at gcc dot gnu.org> ---
So to sum up, a SSA default def would have to be expanded to an explicit (zero)
initialization.  I suppose memory doesn't have a NaT state so stack allocation
for locals doesn't have to change but decls eventually expanding to pseudos
would have to go through the same exercise.

Since we now have -ftrivial-auto-var-init=zero that might serve as a workaround
for GCC 12.

But I guess trying to fix this in RTL expansion shouldn't be too difficult
(gated with a new target hook), if anyone really cares.  Do any better
maintained archs than ia64 have NaTs?  NVPTX was mentioned, but I guess
that's not really easier to handle since it's also a meta-ISA.

[Bug middle-end/21111] IA-64 NaT consumption faults due to uninitialized register reads

[amonakov at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=21111

--- Comment #18 from Alexander Monakov <amonakov at gcc dot gnu.org> ---
>From my perspective, the main blocker for a nice and clean solution is lack of
"birth" statements on GIMPLE.

Without them, expansion to RTL would either need to insert initialization at
the top of the function (which is silly, extends lifetimes of pseudos that only
live in a small region, complicating RA), or compute something like a lowest
common dominator of all uses and place an initialization there. But perhaps
that's the right way if "birth statements" aren't happening?

Or is there some other approach? Like not trying to insert a single
initialization, but instead substituting a zero in place of each use of the
default def individually?

[Bug middle-end/21111] IA-64 NaT consumption faults due to uninitialized register reads

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=21111

--- Comment #19 from Richard Biener <rguenth at gcc dot gnu.org> ---
(In reply to Alexander Monakov from comment #18)
> From my perspective, the main blocker for a nice and clean solution is lack
> of "birth" statements on GIMPLE.

They were not needed until now ;)

> Without them, expansion to RTL would either need to insert initialization at
> the top of the function (which is silly, extends lifetimes of pseudos that
> only live in a small region, complicating RA), or compute something like a
> lowest common dominator of all uses and place an initialization there. But
> perhaps that's the right way if "birth statements" aren't happening?

Yes, note that an explicit birth also affects SSA coalescing so they would
need to be introduced before liveness computation or alternatively
be inserted in possibly multiple places when the reg becomes live.

> Or is there some other approach? Like not trying to insert a single
> initialization, but instead substituting a zero in place of each use of the
> default def individually?

That would of course also work - use replace_uses_by to replace default
defs with zero for modes that have a NaT (I don't think we have an existing
way to check that though).

But maybe one wants to preserve NaT trapping for uninit uses (though that
would require active seeding of default defs with a NaT rather than with
a non-NaT since otherwise the register content is just random and not a NaT).

[Bug middle-end/21111] IA-64 NaT consumption faults due to uninitialized register reads

[pinskia at gcc dot gnu dot org]

------- Additional Comments From pinskia at gcc dot gnu dot org  2005-07-19 05:24 -------
(In reply to comment #3)
> Subject: Re:  IA-64 NaT consumption faults due to uninitialized
> The change I am suggesting should not hurt performance, and I expect 
> that it would actually help performance in many cases.
> 
> Currently, the first assignment to a structure is a bitfield insert.

This is PR 15596 and really an expand issue with respect with NVR.  Use the C++ front-end for both 
3.3 and 4.0.0 and noticed that it happens there too.

I would not doubt you could reproduce this with the C++ front-end before 4.0.0 also.  This is all NVR 
related and nothing more.

-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=21111

[Bug middle-end/21111] IA-64 NaT consumption faults due to uninitialized register reads

[wilson at specifixinc dot com]

------- Additional Comments From wilson at specifixinc dot com  2005-04-19 23:05 -------
Subject: Re:  IA-64 NaT consumption faults due to uninitialized
 register reads

pinskia at gcc dot gnu dot org wrote:
> ------- Additional Comments From pinskia at gcc dot gnu dot org  2005-04-19 20:47 -------
> To me, the target specific code should be the one to fix this problem up and not the middle-end or at 
> least have a hook for it so you don't mess around with other targets getting the speed up.  Anyways 
> seems like someone thought it would be cool if they did this, oh well.

The change I am suggesting should not hurt performance, and I expect 
that it would actually help performance in many cases.

Currently, the first assignment to a structure is a bitfield insert.

If we zero the structure before the first assignment, then combine will 
give us a simple assignment instead, which will be faster than a 
bitfield insert for most targets.  This may also allow other assignments 
to be combined in, giving further benefits.  (There can be multiple 
first assignments if there are multiple blocks where the structure 
becomes live.)

I agree that the optimizations being performed by tree-ssa are useful 
here, but one must not be confused by the big picture issues here into 
ignoring the details.  Emitting a bit-field insert when only a simple 
assignment is needed is wrong.  It may cause performance loss on many 
targets, and it causes core dumps on IA-64.

Take a look at this example.
struct s { unsigned long i : 32; unsigned long j : 32;};
int i;
struct s
sub (void)
{
   struct s foo;
   foo.i = i;
   return foo;
}
Compiling this for x86-64 on mainline, I get 10 instructions, which 
perform two bit-field insertions.  Compiling this with gcc-3.3, I get 7 
instructions which perform one bit-field insertion.

I think the optimal code is two instructions, one to load i into the low 
part of the return register, and one to return.  The upper bits of the 
structure are don't care bits, so we can set them to anything we want. 
There is no need for any bitfield insertion here at all.

Mainline does even worse than gcc-3 here because in order to decompose 
the structure it creates a fake j assignment, and then we end up 
emitting bitfield insertion code for the fake j assignment, even though 
this code is completely useless.  Furthermore, the RTL optimizer is not 
able to delete this fake j assignment, because it is a bitfield insert.


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=21111

[Bug middle-end/21111] IA-64 NaT consumption faults due to uninitialized register reads

[pinskia at gcc dot gnu dot org]

------- Additional Comments From pinskia at gcc dot gnu dot org  2005-04-19 20:47 -------
To me, the target specific code should be the one to fix this problem up and not the middle-end or at 
least have a hook for it so you don't mess around with other targets getting the speed up.  Anyways 
seems like someone thought it would be cool if they did this, oh well.

-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=21111

[Bug middle-end/21111] IA-64 NaT consumption faults due to uninitialized register reads

[wilson at gcc dot gnu dot org]

------- Additional Comments From wilson at gcc dot gnu dot org  2005-04-19 20:41 -------
Created an attachment (id=8684)
 --> (http://gcc.gnu.org/bugzilla/attachment.cgi?id=8684&action=view)
synthetic IA-64 testcase to generate NaT consumption fault

Compile this with -O, and it will fail with gcc-2.96 and gcc-4.0.0.  We get an
illegal instruction signal.  It works with gcc-3.0 and gcc-3.3 and presumably
with every other gcc-3.x release.

If you use gcc-4.0.0 to compile with -O -S, and look at the assembly code, you
can see that r8 is being used uninitialized, which fails if r8 happens to have
the NaT bit set.

-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=21111