From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 80254 invoked by alias); 24 Apr 2015 21:13:39 -0000 Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org Received: (qmail 80214 invoked by uid 48); 24 Apr 2015 21:13:36 -0000 From: "wilson at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug rtl-optimization/26190] combine misses some distributivity Date: Fri, 24 Apr 2015 21:13:00 -0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: rtl-optimization X-Bugzilla-Version: 4.2.0 X-Bugzilla-Keywords: missed-optimization X-Bugzilla-Severity: enhancement X-Bugzilla-Who: wilson at gcc dot gnu.org X-Bugzilla-Status: NEW X-Bugzilla-Priority: P5 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-SW-Source: 2015-04/txt/msg02140.txt.bz2 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=26190 --- Comment #3 from Jim Wilson --- This ior/shift/xor optimization be done during combine with a simplify-rtx.c patch. I wrote a prototype and tested it. Combine canonicalizes shift/logical as logical/shift, so we actually have to look for ior/xor/shift. I see that the optimization does not happen on arm and aarch64 because the 0x4002 value does not fit into the immediate range for logical ops, gets loaded into a register, pulled out of the loop, and hence is not available to combine. We would have to perform the optimization earlier for it to work for arm/aarch64. I tried MIPS, and see that because MIPS promotes HImode to SImode we don't have enough info to prove that the opt is safe. We need type info to make this work. This prototype does work for the x86 target which has both 16-bit immediates and HImode instructions. Next I wrote a prototype for match-and-simplify. This one works for all 4 targets. We have to handle ior/shift/xor as match-and-simplify does not canonicalize logical/shift. I noticed that if I change the xor to an ior, then it gets optimized in combine because of the canonicalization for mips and x86, but not for arm/aarch64 again because the constant was pulled out of the loop. So it seems that match-and-simplify should canonicalize shift/logical to logical/shift too. That would also reduce the number of patterns we need to match when performing this ior/shift/xor optimization. These are prototype patches that need a bit more work to handle more cases, and to prove that they test all conditions necessary to make them safe. This is my first attempt to use the wi:: functions, so there might be a better way to do this.