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* [Bug c/31361]  New: SSE2 generation bug with shifts
@ 2007-03-26  8:53 prakash at punnoor dot de
  2007-03-26  8:54 ` [Bug c/31361] " prakash at punnoor dot de
                   ` (8 more replies)
  0 siblings, 9 replies; 10+ messages in thread
From: prakash at punnoor dot de @ 2007-03-26  8:53 UTC (permalink / raw)
  To: gcc-bugs

Following code results in output 0 0 0 0 with -O1 and higher. -O0 is OK and
gives output ff ff ff ff. gcc-3.4.6 produces correct output even with -O3.


-- 
           Summary: SSE2 generation bug with shifts
           Product: gcc
           Version: 4.1.2
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: c
        AssignedTo: unassigned at gcc dot gnu dot org
        ReportedBy: prakash at punnoor dot de
 GCC build triplet: x86_64
  GCC host triplet: x86_64
GCC target triplet: x86_64


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=31361


^ permalink raw reply	[flat|nested] 10+ messages in thread
* [Bug c/31361] SSE2 generation bug with shifts
  2007-03-26  8:53 [Bug c/31361] New: SSE2 generation bug with shifts prakash at punnoor dot de
@ 2007-03-26  8:54 ` prakash at punnoor dot de
  2007-03-26  9:53 ` prakash at punnoor dot de
                   ` (7 subsequent siblings)
  8 siblings, 0 replies; 10+ messages in thread
From: prakash at punnoor dot de @ 2007-03-26  8:54 UTC (permalink / raw)
  To: gcc-bugs



------- Comment #1 from prakash at punnoor dot de  2007-03-26 09:54 -------
Created an attachment (id=13287)
 --> (http://gcc.gnu.org/bugzilla/attachment.cgi?id=13287&action=view)
triggers bug


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=31361


^ permalink raw reply	[flat|nested] 10+ messages in thread
* [Bug c/31361] SSE2 generation bug with shifts
  2007-03-26  8:53 [Bug c/31361] New: SSE2 generation bug with shifts prakash at punnoor dot de
  2007-03-26  8:54 ` [Bug c/31361] " prakash at punnoor dot de
@ 2007-03-26  9:53 ` prakash at punnoor dot de
  2007-03-26 18:14 ` [Bug target/31361] " rth at gcc dot gnu dot org
                   ` (6 subsequent siblings)
  8 siblings, 0 replies; 10+ messages in thread
From: prakash at punnoor dot de @ 2007-03-26  9:53 UTC (permalink / raw)
  To: gcc-bugs



------- Comment #2 from prakash at punnoor dot de  2007-03-26 10:53 -------
Uhm, looking at the docs again, I am not so sure whether I understood the shift
instructions correctly. It seems I cannot shift the (in this case) 32 bit
portions individually? Rather the second operand to psrld has to be seen as a
128bit value instead of 4 32bit values? Then my code is buggy. But anyway I am
still wondering why -O0 and -O1 are giving different results though.


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=31361


^ permalink raw reply	[flat|nested] 10+ messages in thread
* [Bug target/31361] SSE2 generation bug with shifts
  2007-03-26  8:53 [Bug c/31361] New: SSE2 generation bug with shifts prakash at punnoor dot de
  2007-03-26  8:54 ` [Bug c/31361] " prakash at punnoor dot de
  2007-03-26  9:53 ` prakash at punnoor dot de
@ 2007-03-26 18:14 ` rth at gcc dot gnu dot org
  2007-03-27  0:30 ` rth at gcc dot gnu dot org
                   ` (5 subsequent siblings)
  8 siblings, 0 replies; 10+ messages in thread
From: rth at gcc dot gnu dot org @ 2007-03-26 18:14 UTC (permalink / raw)
  To: gcc-bugs



------- Comment #3 from rth at gcc dot gnu dot org  2007-03-26 19:14 -------
Confirmed.  We've modeled the instruction incorrectly; it takes the shift
count from the entire 128-bit xmm register, not the low 32 or 8 bits.


-- 

rth at gcc dot gnu dot org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
         AssignedTo|unassigned at gcc dot gnu   |rth at gcc dot gnu dot org
                   |dot org                     |
             Status|UNCONFIRMED                 |ASSIGNED
          Component|c                           |target
     Ever Confirmed|0                           |1
  GCC build triplet|x86_64                      |
   GCC host triplet|x86_64                      |
 GCC target triplet|x86_64                      |i386-*
   Last reconfirmed|0000-00-00 00:00:00         |2007-03-26 19:14:44
               date|                            |


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=31361


^ permalink raw reply	[flat|nested] 10+ messages in thread
* [Bug target/31361] SSE2 generation bug with shifts
  2007-03-26  8:53 [Bug c/31361] New: SSE2 generation bug with shifts prakash at punnoor dot de
                   ` (2 preceding siblings ...)
  2007-03-26 18:14 ` [Bug target/31361] " rth at gcc dot gnu dot org
@ 2007-03-27  0:30 ` rth at gcc dot gnu dot org
  2007-03-27  0:37 ` rth at gcc dot gnu dot org
                   ` (4 subsequent siblings)
  8 siblings, 0 replies; 10+ messages in thread
From: rth at gcc dot gnu dot org @ 2007-03-27  0:30 UTC (permalink / raw)
  To: gcc-bugs



------- Comment #4 from rth at gcc dot gnu dot org  2007-03-27 01:30 -------
Subject: Bug 31361

Author: rth
Date: Tue Mar 27 01:30:32 2007
New Revision: 123250

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=123250
Log:
        PR target/31361
        * config/i386/i386.c (IX86_BUILTIN_PSLLDQ128, IX86_BUILTIN_PSLLW128,
        IX86_BUILTIN_PSLLD128, IX86_BUILTIN_PSLLQ128, IX86_BUILTIN_PSRAW128,
        IX86_BUILTIN_PSRAD128, IX86_BUILTIN_PSRLW128, IX86_BUILTIN_PSRLD128,
        IX86_BUILTIN_PSRLQ128): New.
        (ix86_init_mmx_sse_builtins): Add them.
        (ix86_expand_builtin): Expand them.
        * config/i386/sse.md (ashr<mode>3, lshr<mode>3, ashl<mode>3): Make
        operand 2 be TImode.
        * config/i386/emmintrin.h (_mm_slli_epi64, _mm_srai_epi16,
        _mm_srai_epi32, _mm_srli_epi16, _mm_srli_epi32,
        _mm_srli_epi64): Mark __B const.
        (_mm_srli_si128, _mm_srli_si128): Fix disabled inline versions.
        (_mm_sll_epi16, _mm_sll_epi32, _mm_sll_epi64, _mm_sra_epi16,
        _mm_sra_epi32, _mm_srl_epi16, _mm_srl_epi32, _mm_srl_epi64): Use 
        new two-vector shift builtins.

Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/config/i386/emmintrin.h
    trunk/gcc/config/i386/i386.c
    trunk/gcc/config/i386/sse.md


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=31361


^ permalink raw reply	[flat|nested] 10+ messages in thread
* [Bug target/31361] SSE2 generation bug with shifts
  2007-03-26  8:53 [Bug c/31361] New: SSE2 generation bug with shifts prakash at punnoor dot de
                   ` (3 preceding siblings ...)
  2007-03-27  0:30 ` rth at gcc dot gnu dot org
@ 2007-03-27  0:37 ` rth at gcc dot gnu dot org
  2007-03-27  7:35 ` prakash at punnoor dot de
                   ` (3 subsequent siblings)
  8 siblings, 0 replies; 10+ messages in thread
From: rth at gcc dot gnu dot org @ 2007-03-27  0:37 UTC (permalink / raw)
  To: gcc-bugs



------- Comment #5 from rth at gcc dot gnu dot org  2007-03-27 01:37 -------
You can shift the 32-bit portions individually.  But your test case will now
result in 0,0,0,0 for all optimization levels, since the shift count is taken
from the entire xmm register.  In this case, since there is an 8 in each of
the 4 32-bit portions, the shift count is extremely large.

Fixed.


-- 

rth at gcc dot gnu dot org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|ASSIGNED                    |RESOLVED
         Resolution|                            |FIXED


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=31361


^ permalink raw reply	[flat|nested] 10+ messages in thread
* [Bug target/31361] SSE2 generation bug with shifts
  2007-03-26  8:53 [Bug c/31361] New: SSE2 generation bug with shifts prakash at punnoor dot de
                   ` (4 preceding siblings ...)
  2007-03-27  0:37 ` rth at gcc dot gnu dot org
@ 2007-03-27  7:35 ` prakash at punnoor dot de
  2007-04-04 22:12 ` rth at gcc dot gnu dot org
                   ` (2 subsequent siblings)
  8 siblings, 0 replies; 10+ messages in thread
From: prakash at punnoor dot de @ 2007-03-27  7:35 UTC (permalink / raw)
  To: gcc-bugs



------- Comment #6 from prakash at punnoor dot de  2007-03-27 08:35 -------
Well, you commited the fix for the trunk, ie 4.2? But what about 4.1?


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=31361


^ permalink raw reply	[flat|nested] 10+ messages in thread
* [Bug target/31361] SSE2 generation bug with shifts
  2007-03-26  8:53 [Bug c/31361] New: SSE2 generation bug with shifts prakash at punnoor dot de
                   ` (5 preceding siblings ...)
  2007-03-27  7:35 ` prakash at punnoor dot de
@ 2007-04-04 22:12 ` rth at gcc dot gnu dot org
  2007-04-04 22:13 ` rth at gcc dot gnu dot org
  2007-04-15  5:28 ` pinskia at gcc dot gnu dot org
  8 siblings, 0 replies; 10+ messages in thread
From: rth at gcc dot gnu dot org @ 2007-04-04 22:12 UTC (permalink / raw)
  To: gcc-bugs



------- Comment #7 from rth at gcc dot gnu dot org  2007-04-04 23:11 -------
Subject: Bug 31361

Author: rth
Date: Wed Apr  4 23:11:30 2007
New Revision: 123504

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=123504
Log:
        PR target/31361
        * config/i386/i386.c (ix86_init_mmx_sse_builtins): Remove
        v8hi_ftype_v8hi_v2di, v4si_ftype_v4si_v2di.  Use like-types for
        the variable shift builtins.
        (ix86_expand_builtin): Properly expand the variable shift builtins.
        * config/i386/sse.md (ashr<mode>3, lshr<mode>3, ashl<mode>3): Make
        operand 2 be TImode.
        * config/i386/emmintrin.h (_mm_slli_epi16, _mm_slli_epi32,
        _mm_slli_epi64, _mm_srai_epi16, _mm_srai_epi32, _mm_srli_epi16,
        _mm_srli_epi32, _mm_srli_epi64): Turn into macros.
        (_mm_srli_si128, _mm_srli_si128): Fix disabled inline versions.
        (_mm_sll_epi16, _mm_sll_epi32, _mm_sll_epi64, _mm_sra_epi16,
        _mm_sra_epi32, _mm_srl_epi16, _mm_srl_epi32, _mm_srl_epi64): Use
        two-vector shift builtins.

Modified:
    branches/gcc-4_1-branch/gcc/ChangeLog
    branches/gcc-4_1-branch/gcc/config/i386/emmintrin.h
    branches/gcc-4_1-branch/gcc/config/i386/i386.c
    branches/gcc-4_1-branch/gcc/config/i386/sse.md


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=31361


^ permalink raw reply	[flat|nested] 10+ messages in thread
* [Bug target/31361] SSE2 generation bug with shifts
  2007-03-26  8:53 [Bug c/31361] New: SSE2 generation bug with shifts prakash at punnoor dot de
                   ` (6 preceding siblings ...)
  2007-04-04 22:12 ` rth at gcc dot gnu dot org
@ 2007-04-04 22:13 ` rth at gcc dot gnu dot org
  2007-04-15  5:28 ` pinskia at gcc dot gnu dot org
  8 siblings, 0 replies; 10+ messages in thread
From: rth at gcc dot gnu dot org @ 2007-04-04 22:13 UTC (permalink / raw)
  To: gcc-bugs



------- Comment #8 from rth at gcc dot gnu dot org  2007-04-04 23:13 -------
Subject: Bug 31361

Author: rth
Date: Wed Apr  4 23:13:13 2007
New Revision: 123505

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=123505
Log:
        PR target/31361
        * config/i386/i386.c (ix86_init_mmx_sse_builtins): Remove
        v8hi_ftype_v8hi_v2di, v4si_ftype_v4si_v2di.  Use like-types for
        the variable shift builtins.
        (ix86_expand_builtin): Properly expand the variable shift builtins.
        * config/i386/sse.md (ashr<mode>3, lshr<mode>3, ashl<mode>3): Make
        operand 2 be TImode.
        * config/i386/emmintrin.h (_mm_slli_epi16, _mm_slli_epi32,
        _mm_slli_epi64, _mm_srai_epi16, _mm_srai_epi32, _mm_srli_epi16,
        _mm_srli_epi32, _mm_srli_epi64): Turn into macros.
        (_mm_srli_si128, _mm_srli_si128): Fix disabled inline versions.
        (_mm_sll_epi16, _mm_sll_epi32, _mm_sll_epi64, _mm_sra_epi16,
        _mm_sra_epi32, _mm_srl_epi16, _mm_srl_epi32, _mm_srl_epi64): Use
        two-vector shift builtins.

Modified:
    branches/gcc-4_2-branch/gcc/ChangeLog
    branches/gcc-4_2-branch/gcc/config/i386/emmintrin.h
    branches/gcc-4_2-branch/gcc/config/i386/i386.c
    branches/gcc-4_2-branch/gcc/config/i386/sse.md


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=31361


^ permalink raw reply	[flat|nested] 10+ messages in thread
* [Bug target/31361] SSE2 generation bug with shifts
  2007-03-26  8:53 [Bug c/31361] New: SSE2 generation bug with shifts prakash at punnoor dot de
                   ` (7 preceding siblings ...)
  2007-04-04 22:13 ` rth at gcc dot gnu dot org
@ 2007-04-15  5:28 ` pinskia at gcc dot gnu dot org
  8 siblings, 0 replies; 10+ messages in thread
From: pinskia at gcc dot gnu dot org @ 2007-04-15  5:28 UTC (permalink / raw)
  To: gcc-bugs



-- 

pinskia at gcc dot gnu dot org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Target Milestone|---                         |4.1.3


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=31361


^ permalink raw reply	[flat|nested] 10+ messages in thread
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Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2007-03-26  8:53 [Bug c/31361] New: SSE2 generation bug with shifts prakash at punnoor dot de
2007-03-26  8:54 ` [Bug c/31361] " prakash at punnoor dot de
2007-03-26  9:53 ` prakash at punnoor dot de
2007-03-26 18:14 ` [Bug target/31361] " rth at gcc dot gnu dot org
2007-03-27  0:30 ` rth at gcc dot gnu dot org
2007-03-27  0:37 ` rth at gcc dot gnu dot org
2007-03-27  7:35 ` prakash at punnoor dot de
2007-04-04 22:12 ` rth at gcc dot gnu dot org
2007-04-04 22:13 ` rth at gcc dot gnu dot org
2007-04-15  5:28 ` pinskia at gcc dot gnu dot org

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