From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: by sourceware.org (Postfix, from userid 48) id 9446E386F80F; Tue, 21 Apr 2020 08:34:42 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 9446E386F80F DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1587458082; bh=3s7PSN+NAZLJ3kLS8K5I/NDe0v4YDEcAWmcFPfPcwgk=; h=From:To:Subject:Date:In-Reply-To:References:From; b=TJ6qaPuUpU8GcX1+MybgumPUj9EIU1yvi2Y7vg2u+AHjzH7WVc8Y/FJLLKwHyIa7P SUHFy7lWyQJyrljghO/A1B0lHzTtNgK5DQMuslwSA9uI7desQEBhUEwd3+hiFBBI1N B4URB8yLH+qw4pJe9tbydL0z0Fu+w7WVCJx5c3/8= From: "bisqwit at iki dot fi" To: gcc-bugs@gcc.gnu.org Subject: [Bug rtl-optimization/31485] C complex numbers, amd64 SSE, missed optimization opportunity Date: Tue, 21 Apr 2020 08:34:42 +0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: rtl-optimization X-Bugzilla-Version: 4.1.2 X-Bugzilla-Keywords: X-Bugzilla-Severity: enhancement X-Bugzilla-Who: bisqwit at iki dot fi X-Bugzilla-Status: NEW X-Bugzilla-Resolution: X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Flags: X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated MIME-Version: 1.0 X-BeenThere: gcc-bugs@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-bugs mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 21 Apr 2020 08:34:42 -0000 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=3D31485 --- Comment #20 from Joel Yliluoma --- (In reply to Jakub Jelinek from comment #16) > (In reply to Joel Yliluoma from comment #15) > > (In reply to Richard Biener from comment #14) > > > I also think llvms code generation is bogus since it appears the ABI > > > does not guarantee zeroed upper elements of the xmm0 argument > > > which means they could contain sNaNs: > >=20 > > Why would it matter that the unused portions of the register contain Na= Ns? >=20 > Because it could then raise exceptions that shouldn't be raised? Which exceptions would be generated by data in an unused portion of a regis= ter? Does for example =E2=80=9Caddps=E2=80=9D generate an exception if one or tw= o of the operands contains NaNs? Which instructions would generate exceptions? I can only think of divps, when dividing by a zero, but it does not seem th= at even LLVM compiles the two-element vector division into divps. If the register is passed as a parameter to a library function, they would = not make judgments based on the values of the unused portions of the registers.=