From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 11138 invoked by alias); 11 Jun 2012 08:39:59 -0000 Received: (qmail 11068 invoked by uid 22791); 11 Jun 2012 08:39:58 -0000 X-SWARE-Spam-Status: No, hits=-4.3 required=5.0 tests=ALL_TRUSTED,AWL,BAYES_00,KHOP_THREADED X-Spam-Check-By: sourceware.org Received: from localhost (HELO gcc.gnu.org) (127.0.0.1) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Mon, 11 Jun 2012 08:39:46 +0000 From: "rguenther at suse dot de" To: gcc-bugs@gcc.gnu.org Subject: [Bug rtl-optimization/32629] missing CSE for constant in registers / inefficient memset Date: Mon, 11 Jun 2012 08:39:00 -0000 X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: rtl-optimization X-Bugzilla-Keywords: missed-optimization X-Bugzilla-Severity: enhancement X-Bugzilla-Who: rguenther at suse dot de X-Bugzilla-Status: NEW X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated Content-Type: text/plain; charset="UTF-8" MIME-Version: 1.0 Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org X-SW-Source: 2012-06/txt/msg00565.txt.bz2 http://gcc.gnu.org/bugzilla/show_bug.cgi?id=32629 --- Comment #3 from rguenther at suse dot de 2012-06-11 08:39:45 UTC --- On Sat, 9 Jun 2012, hubicka at ucw dot cz wrote: > http://gcc.gnu.org/bugzilla/show_bug.cgi?id=32629 > > --- Comment #2 from Jan Hubicka 2012-06-09 22:17:07 UTC --- > > I suppose doing the $0x0 optimization should be done post-reload. > I was wondering how to implement this nice for some years already.... I don't > see how this can be done without specialized pass, really, and the interface is > probably going to be bit weird, since it is very weird property of x86 > instruction set that there are no stores with short immediate... I wonder if we can use a peephole2 and DF information (and update it on-the-fly). Thus, when seeing mov $0, ... mov $0, ... transform it incrementally to xor %eax, %eax mov %eax, ... mov $0, ... and then have a 2nd peephole2 with higher priority that looks for a register with zero content (eh ... that's the interesting part ;)) and do xor %eax, %eax mov %eax, ... mov %eax, ... I suppose we have the first peephole already - though we'd end up with xor %eax, %eax mov %eax, ... xor %eax, %eax mov %eax, ... and rely on postreload-cse to clean that up (which isn't run after the peephole2 in postreload queue ...) Richard.