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From: "kkojima at gcc dot gnu dot org" <gcc-bugzilla@gcc.gnu.org> To: gcc-bugs@gcc.gnu.org Subject: [Bug middle-end/33662] New: [4.3 Regression] Wrong register allocation on SH Date: Fri, 05 Oct 2007 01:54:00 -0000 [thread overview] Message-ID: <bug-33662-5208@http.gcc.gnu.org/bugzilla/> (raw) Several libffi testcases and gcc.c-torture/execute/pr23135.c fail with the execution error for sh4-unknown-linux-gnu after the patch: r128957 | zadeck | 2007-10-02 22:10:07 +0900 (Tue, 02 Oct 2007) | 70 lines A reduced testcase is typedef struct A { unsigned long long a; unsigned char b; } A; typedef struct B { struct A x; unsigned char y; } B; B B_fn(struct A b0, struct B b1) { struct B result; result.x.a = b0.a + b1.x.a; result.x.b = b0.b + b1.x.b + b1.y; result.y = b0.b + b1.x.b; printf("%d %d %d %d %d: %d %d %d\n", (int)b0.a, b0.b, (int)b1.x.a, b1.x.b, b1.y, (int)result.x.a, result.x.b, result.y); return result; } which is compiled to B_fn: mov.l r8,@-r15 clrt mov.l r9,@-r15 mov.l r10,@-r15 mov.l r11,@-r15 mov.l r12,@-r15 mov.l r13,@-r15 mov r2,r13 mov.l r14,@-r15 sts.l pr,@-r15 add #-28,r15 mov r15,r14 mov r14,r1 add #60,r1 mov.l @r1+,r7 mov.l @r1+,r8 add #-20,r15 mov.b @r1,r0 extu.b r6,r8 with -O2 -ml -m4 on sh-elf. The last extu.b instruction clobbers r8 whose content was loaded from a memory with "mov.l @r1+,r8". The corresponding .lreg dump is: (insn:HI 20 68 23 3 str3.c:12 (set (reg:DI 164 [ b1$x$a ]) (mem/s/c:DI (post_inc:SI (reg/f:SI 178)) [5 b1.x.a+0 S8 A32])) 186 {*movdi_i} (expr_list:REG_INC (reg/f:SI 178) (nil))) (insn:HI 23 20 19 3 str3.c:12 (set (reg:QI 179 [ b1.x.b ]) (mem/s/c:QI (reg/f:SI 178) [0 b1.x.b+0 S1 A32])) 182 {movqi_i} (expr_list:REG_DEAD (reg/f:SI 178) (nil))) (insn:HI 19 23 76 3 str3.c:12 (set (reg:SI 165 [ b0$b ]) (zero_extend:SI (reg:QI 6 r6))) 153 {*zero_extendqisi2_compact} (nil)) and the .greg dump is: (insn:HI 20 68 23 2 str3.c:12 (set (reg:DI 7 r7 [orig:164 b1$x$a ] [164]) (mem/s/c:DI (post_inc:SI (reg/f:SI 1 r1 [178])) [5 b1.x.a+0 S8 A32])) 186 {*movdi_i} (expr_list:REG_INC (reg/f:SI 1 r1 [178]) (nil))) (insn:HI 23 20 19 2 str3.c:12 (set (reg:QI 0 r0 [orig:179 b1.x.b ] [179]) (mem/s/c:QI (reg/f:SI 1 r1 [178]) [0 b1.x.b+0 S1 A32])) 182 {movqi_i} (nil)) (insn:HI 19 23 79 2 str3.c:12 (set (reg:SI 8 r8 [orig:165 b0$b ] [165]) (zero_extend:SI (reg:QI 6 r6))) 153 {*zero_extendqisi2_compact} (nil)) It looks that the register allocater selects r8 for pseudo 165, but r8 is already allocated as a part of the register pair r7..r8 which is allocated for pseudo 164. -- Summary: [4.3 Regression] Wrong register allocation on SH Product: gcc Version: 4.3.0 Status: UNCONFIRMED Keywords: wrong-code Severity: normal Priority: P3 Component: middle-end AssignedTo: unassigned at gcc dot gnu dot org ReportedBy: kkojima at gcc dot gnu dot org GCC target triplet: sh-elf http://gcc.gnu.org/bugzilla/show_bug.cgi?id=33662
next reply other threads:[~2007-10-05 1:54 UTC|newest] Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top 2007-10-05 1:54 kkojima at gcc dot gnu dot org [this message] 2007-10-08 2:23 ` [Bug middle-end/33662] " kkojima at gcc dot gnu dot org 2007-10-08 3:53 ` zadeck at naturalbridge dot com 2007-10-10 13:28 ` kkojima at gcc dot gnu dot org 2007-10-10 13:33 ` zadeck at naturalbridge dot com 2007-10-11 0:52 ` spark at gcc dot gnu dot org 2007-10-11 3:07 ` spark at gcc dot gnu dot org 2007-10-11 21:51 ` zadeck at naturalbridge dot com 2007-10-12 2:06 ` kkojima at gcc dot gnu dot org
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