[Bug target/38320] New: missed movd opcode (32bits mm -> r/m32).

[Bug target/38320] New: missed movd opcode (32bits mm -> r/m32).

[pluto at agmk dot net]

#include <mmintrin.h>
int foo( __m64 x )
{
    int y;
    __builtin_memcpy( &y, &x, sizeof( y ) );
    return y;
}

gcc movd.c -O2 -S produces:

foo:    movq    %xmm0, -24(%rsp)
        movl    -24(%rsp), %eax
        ret

while 'movd xmm0, eax' was expected.


-- 
           Summary: missed movd opcode (32bits mm -> r/m32).
           Product: gcc
           Version: 4.3.3
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
        AssignedTo: unassigned at gcc dot gnu dot org
        ReportedBy: pluto at agmk dot net
GCC target triplet: x86-gnu-linux


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=38320

[Bug target/38320] missed movd opcode (32bits mm -> r/m32).

[hjl dot tools at gmail dot com]

------- Comment #1 from hjl dot tools at gmail dot com  2008-11-30 00:51 -------
You need -mtune=core to generate "movd %xmm0, %rax". Gcc 4.4 works.


-- 

hjl dot tools at gmail dot com changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
      Known to work|                            |4.4.0


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=38320

[Bug target/38320] missed movd opcode (32bits mm -> r/m32).

[pluto at agmk dot net]

------- Comment #2 from pluto at agmk dot net  2008-11-30 10:23 -------
(In reply to comment #1)
> You need -mtune=core to generate "movd %xmm0, %rax". Gcc 4.4 works.

is movd faster only on core2 architecture?
and what about 32-bits?

$ /opt/gcc44/bin/gcc movd.c -O2 -S -march=core2 -m32

foo:    pushl   %ebp
        movl    %esp, %ebp
        subl    $16, %esp
        movq    %mm0, -16(%ebp)        <===? movd mm0, eax
        movl    -16(%ebp), %eax        <===/
        leave
        ret


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=38320

[Bug target/38320] missed movd opcode (32bits mm -> r/m32).

[ubizjak at gmail dot com]

------- Comment #3 from ubizjak at gmail dot com  2008-11-30 11:43 -------
(In reply to comment #2)

> and what about 32-bits?

The quote from i386.c:

  /* ??? This is a lie.  We do have moves between mmx/general, and for
     mmx/sse2.  But by saying we need secondary memory we discourage the
     register allocator from using the mmx registers unless needed.  */
  if (MMX_CLASS_P (class1) != MMX_CLASS_P (class2))
    return true;


-- 


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=38320

[Bug target/38320] missed movd opcode (32bits mm -> r/m32).

[ubizjak at gmail dot com]

------- Comment #4 from ubizjak at gmail dot com  2009-09-17 09:10 -------
The problem from Comment #2 won't be fixed. Too little gain for too much pain.
And %mm registers are evil as they alias x87 regs.


-- 

ubizjak at gmail dot com changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |RESOLVED
         Resolution|                            |WONTFIX


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=38320