[Bug tree-optimization/38401] TreeSSA-PRE load after store missed optimization

[Bug tree-optimization/38401] TreeSSA-PRE load after store missed optimization

[steven at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=38401

Steven Bosscher <steven at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|ASSIGNED                    |NEW
                 CC|                            |ramana at gcc dot gnu.org

--- Comment #26 from Steven Bosscher <steven at gcc dot gnu.org> 2012-03-16 23:53:14 UTC ---
(In reply to comment #25)
> (In reply to comment #24)
> > Unfortunately, there is still no word from the FSF on what they did with our
> > Copyright Assignment.
> 
> As already mentioned in PR 38785, I've posted the patch here:
> http://gcc.gnu.org/ml/gcc-patches/2009-03/msg00250.html
> 
> It is also integrated in the milepost-branch.

I am not working on this, but Ramana is working on partial-partial PRE and may
be interested in porting over that patch from comment #25.

[Bug tree-optimization/38401] TreeSSA-PRE load after store missed optimization

[amylaar at gcc dot gnu dot org]

------- Comment #25 from amylaar at gcc dot gnu dot org  2009-07-30 23:30 -------
(In reply to comment #24)
> Unfortunately, there is still no word from the FSF on what they did with our
> Copyright Assignment.

As already mentioned in PR 38785, I've posted the patch here:
http://gcc.gnu.org/ml/gcc-patches/2009-03/msg00250.html

It is also integrated in the milepost-branch.


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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=38401

[Bug tree-optimization/38401] TreeSSA-PRE load after store missed optimization

[amylaar at gcc dot gnu dot org]

------- Comment #24 from amylaar at gcc dot gnu dot org  2009-02-02 20:02 -------
(In reply to comment #22)
> If you post a patch to add the option to enable/disable partial-PRE I will
> happily review and approve it for 4.4.

I experimented using Seteven Bosscher's patch as a starting point and
augmenting the test in do_regular_insertion with a speed based heuristic
to throttle the calls to insert_into_preds_of_block.  That was worse than
turning off partial-PRE altogether.  Then I added the heuristic also in
do_partial_insertion, which worked better.  Then I tried to remove the speed
heuristoc from do_regular_insertion, and taht change only very tiny, although
overall beneficial, effects.

To get meaningful results we had to modify the linking a bit to reduce
instruction cache effects: the most needed libgcc function were pulled out
early and placed next to the core benchmark objects.

applying heuristic only to partial-partial vs. not applying it at all is...
automotive: 6.55389% faster
consumer:   0.00048% worse
networking: 0.03793% faster
office:     0.07269% worse
telecom:    0.00000% faster

applying heuristic only to partial-partial vs. applying it in general is...
automotive: 0.00674% faster
consumer:   0.00076% worse
networking: 0.01746% faster
office:     0.00440% worse
telecom:    0.00002% worse

Unfortunately, there is still no word from the FSF on what they did with our
Copyright Assignment.


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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=38401

[Bug tree-optimization/38401] TreeSSA-PRE load after store missed optimization

[steven at gcc dot gnu dot org]

-- 

steven at gcc dot gnu dot org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
         AssignedTo|unassigned at gcc dot gnu   |steven at gcc dot gnu dot
                   |dot org                     |org
             Status|NEW                         |ASSIGNED
   Last reconfirmed|2008-12-04 15:14:42         |2009-01-18 21:34:08
               date|                            |


http://gcc.gnu.org/bugzilla/show_bug.cgi?id=38401

[Bug tree-optimization/38401] TreeSSA-PRE load after store missed optimization

[amylaar at gcc dot gnu dot org]

------- Comment #23 from amylaar at gcc dot gnu dot org  2009-01-13 14:58 -------
(In reply to comment #22)
> If you post a patch to add the option to enable/disable partial-PRE I will
> happily review and approve it for 4.4.

I'd be happy to post the patch, but we (ARC) are still waiting for the
FSF acknowledgement that our copyright assignment has been filed.


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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=38401

[Bug tree-optimization/38401] TreeSSA-PRE load after store missed optimization

[rguenther at suse dot de]

------- Comment #22 from rguenther at suse dot de  2009-01-13 14:29 -------
Subject: Re:  TreeSSA-PRE load after store missed
 optimization

On Tue, 13 Jan 2009, amylaar at gcc dot gnu dot org wrote:

> ------- Comment #21 from amylaar at gcc dot gnu dot org  2009-01-13 14:11 -------
> (In reply to comment #20)
> > office:     1.39% worse
> 
> Actually, this is the EEMBC version with bezier01, where the entire benchmark
> gets optized away and thus tiny changes in the cost of the set-up code make
> noticeable differences.  Comparing the geometric means with bezier01 left out
> gives:
> 
> automotive: 5.73% improvement
> consumer:   0.04% improvement
> networking: 0.37% improvement
> office:     0.90% worse
> telecom:    0.00% worse

If you post a patch to add the option to enable/disable partial-PRE I will
happily review and approve it for 4.4.

Richard.


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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=38401

[Bug tree-optimization/38401] TreeSSA-PRE load after store missed optimization

[amylaar at gcc dot gnu dot org]

------- Comment #21 from amylaar at gcc dot gnu dot org  2009-01-13 14:11 -------
(In reply to comment #20)
> office:     1.39% worse

Actually, this is the EEMBC version with bezier01, where the entire benchmark
gets optized away and thus tiny changes in the cost of the set-up code make
noticeable differences.  Comparing the geometric means with bezier01 left out
gives:

automotive: 5.73% improvement
consumer:   0.04% improvement
networking: 0.37% improvement
office:     0.90% worse
telecom:    0.00% worse


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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=38401

[Bug tree-optimization/38401] TreeSSA-PRE load after store missed optimization

[amylaar at gcc dot gnu dot org]

------- Comment #20 from amylaar at gcc dot gnu dot org  2009-01-13 14:00 -------
(In reply to comment #19)
> Joern, nobody is forcing you to follow the crowd if you think the crowd is
> going in the wrong direction.

I have evidence that the direction is wrong.  I added a new option to disable
partial-partial pre while keeping the rest of -O3 and -ftree-pre enabled.
This got EEMBC bitmnp back to the level of 4.2.1 (unmodified 4.4.0 needs 2.55
times the amout of cycles).  fbital00 also improved, although it regained only
a little of the performance that it lost since 4.2.1 - cycle count is now down
6% against unmodified gcc 4.4.0 .  Overall the disabling of partial-partial
is also beneficial for EEMBC; there are a few other benchmarks that improved
5 or 6 percent, and the worst regressions are one and two percent.

These are the changes in the geometric means of cycle counts by disabling
partial-partial redundancy elimination per EEMBC benchmark suite:

automotive: 5.73% improvement
consumer:   0.04% improvement
networking: 0.37% improvement
office:     1.39% worse
telecom:    0.00% worse


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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=38401

[Bug tree-optimization/38401] TreeSSA-PRE load after store missed optimization

[steven at gcc dot gnu dot org]

------- Comment #19 from steven at gcc dot gnu dot org  2009-01-13 08:19 -------
Joern, nobody is forcing you to follow the crowd if you think the crowd is
going in the wrong direction.


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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=38401

[Bug tree-optimization/38401] TreeSSA-PRE load after store missed optimization

[amylaar at gcc dot gnu dot org]

------- Comment #18 from amylaar at gcc dot gnu dot org  2009-01-12 18:09 -------
(In reply to comment #17)
> I think enabling partial PRE to do it is appropriate (with at most inserting
> on one edge).

I think the abstraction with tree-ssa and cfglayout mode has gone too far.
We no longer have visibility of the costs of branches, or of opportunities
for conditional execution.
I suspect that the 35% speed regressions we see on EEMBC fbital at -O3 are
also to blame on overzealous tree-pre partial-partial redundancy eliminations.


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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=38401

[Bug tree-optimization/38401] TreeSSA-PRE load after store missed optimization

[rguenth at gcc dot gnu dot org]

------- Comment #17 from rguenth at gcc dot gnu dot org  2008-12-29 22:17 -------
I think enabling partial PRE to do it is appropriate (with at most inserting
on one edge).


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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=38401

[Bug tree-optimization/38401] TreeSSA-PRE load after store missed optimization

[sergeid at il dot ibm dot com]

------- Comment #16 from sergeid at il dot ibm dot com  2008-12-21 07:44 -------
(In reply to comment #15)
> Re. comment #14: Yes, I suppose so.  Why do you want to remove gcse-las from
> mainline.  Not that I'm against it -- ideally RTL gcse.c would not work on
> memory at all anymore -- but I wouldn't remove gcse-las until we catch in the
> GIMPLE optimizers as much as possible of the things we still need gcse-las for.

For the time being this is the only case I've found out which is missed by
tree-PRE and caught by GCSE-LAS. As you pointed out, GCSE-LAS doesn't seem to
help much.

> It seems to me, btw, that it might be easier to teach GIMPLE loop invariant
> code motion about this transformation.  Adding this in GIMPLE PRE might be a
> little too expensive...?

That may be; I was just noting that such redundancies should be caught
somewhere at the GIMPLE stage.


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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=38401