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Subject: [Bug target/42536] [4.6/4.7/4.8 regression] ICE in spill_failure, at reload1.c:2141
Date: Sun, 02 Sep 2012 09:45:00 -0000
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http://gcc.gnu.org/bugzilla/show_bug.cgi?id=42536

--- Comment #12 from Uros Bizjak <ubizjak at gmail dot com> 2012-09-02 09:44:12 UTC ---
(In reply to comment #11)

> Reconfirmed.

BTW: Moving the complex address to the temporary (as proposed in Comment #4)
would help "atomic_compare_and_swap<dwi>_doubleword" on 32bit x86 targets, too.
This pattern uses cmpxchg8b_pic_memory_operand predicate to limit the number of
address registers for 32bit x86 targets, in order to avoid spill failures.
Please see i386/sync.md.