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From: "rguenth at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org> To: gcc-bugs@gcc.gnu.org Subject: [Bug rtl-optimization/45652] [4.6 Regression] gcc.dg/compat/scalar-by-value-3 FAILs with -O2 -fselective-scheduling2 Date: Thu, 04 Nov 2010 16:36:00 -0000 [thread overview] Message-ID: <bug-45652-4-55f7J74gsZ@http.gcc.gnu.org/bugzilla/> (raw) In-Reply-To: <bug-45652-4@http.gcc.gnu.org/bugzilla/> http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45652 --- Comment #3 from Richard Guenther <rguenth at gcc dot gnu.org> 2010-11-04 16:35:55 UTC --- It looks like scheduling itself adds the instruction that references (mem/s:DI (reg:DI 4 si) [0 MEM[(struct S * {ref-all})addr.0_2]+0 S8 A64]) making use of 'si' where it was formerly not used but fails to record its set and thus invalidate the base alias info. Thus, register renaming needs to properly fixup alias info or refrain from touching registers which have reg_base_value set.
next prev parent reply other threads:[~2010-11-04 16:36 UTC|newest] Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top [not found] <bug-45652-4@http.gcc.gnu.org/bugzilla/> 2010-09-29 17:27 ` rguenth at gcc dot gnu.org 2010-11-04 16:36 ` rguenth at gcc dot gnu.org [this message] 2010-11-04 16:49 ` rguenth at gcc dot gnu.org 2010-11-17 14:08 ` rguenth at gcc dot gnu.org 2010-11-17 14:08 ` ebotcazou at gcc dot gnu.org 2010-11-17 14:26 ` rguenth at gcc dot gnu.org 2010-11-17 15:32 ` ebotcazou at gcc dot gnu.org 2010-11-17 15:44 ` amonakov at gcc dot gnu.org 2010-11-22 10:36 ` amonakov at gcc dot gnu.org 2010-11-22 10:40 ` amonakov at gcc dot gnu.org 2011-04-07 6:54 ` abel at gcc dot gnu.org 2010-09-12 15:42 [Bug rtl-optimization/45652] New: " zsojka at seznam dot cz 2010-09-12 15:44 ` [Bug rtl-optimization/45652] " zsojka at seznam dot cz 2010-09-12 17:57 ` rguenth at gcc dot gnu dot org 2010-09-13 16:54 ` amonakov at gcc dot gnu dot org
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