[Bug target/46199] New: Insn length wrong for AVX instructions

["jakub at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=46199

           Summary: Insn length wrong for AVX instructions
           Product: gcc
           Version: 4.6.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
        AssignedTo: unassigned@gcc.gnu.org
        ReportedBy: jakub@gcc.gnu.org


#include <emmintrin.h>

#define F(n,r1,r2,r3) \
void                                            \
f##n (void)                                     \
{                                               \
  register __m128d m1 __asm (#r1);              \
  register __m128d m2 __asm (#r2);              \
  register __m128d m3 __asm (#r3);              \
  asm volatile ("" : "=x" (m1), "=x" (m2));     \
  m3 = _mm_xor_pd (m1, m2);                     \
  asm volatile ("" : : "x" (m3));               \
}

F (1, xmm4, xmm5, xmm6)
F (2, xmm12, xmm5, xmm6)
F (3, xmm4, xmm13, xmm6)
F (4, xmm4, xmm5, xmm14)
F (5, xmm12, xmm13, xmm6)
F (6, xmm12, xmm5, xmm14)
F (7, xmm4, xmm13, xmm14)
F (8, xmm12, xmm13, xmm14)

gcc -O2 -S -dP foo.c
grep vxorp foo.s
        vxorpd  %xmm5, %xmm4, %xmm6     # 10    *avx_xorv2df3   [length = 4]
        vxorpd  %xmm5, %xmm12, %xmm6    # 10    *avx_xorv2df3   [length = 4]
        vxorpd  %xmm13, %xmm4, %xmm6    # 10    *avx_xorv2df3   [length = 4]
        vxorpd  %xmm5, %xmm4, %xmm14    # 10    *avx_xorv2df3   [length = 4]
        vxorpd  %xmm13, %xmm12, %xmm6   # 10    *avx_xorv2df3   [length = 4]
        vxorpd  %xmm5, %xmm12, %xmm14   # 10    *avx_xorv2df3   [length = 4]
        vxorpd  %xmm13, %xmm4, %xmm14   # 10    *avx_xorv2df3   [length = 4]
        vxorpd  %xmm13, %xmm12, %xmm14  # 10    *avx_xorv2df3   [length = 4]
objdump -dr foo.o | grep vxorp
   0:   c5 d9 57 f5             vxorpd %xmm5,%xmm4,%xmm6
  10:   c5 99 57 f5             vxorpd %xmm5,%xmm12,%xmm6
  20:   c4 c1 59 57 f5          vxorpd %xmm13,%xmm4,%xmm6
  30:   c5 59 57 f5             vxorpd %xmm5,%xmm4,%xmm14
  40:   c4 c1 19 57 f5          vxorpd %xmm13,%xmm12,%xmm6
  50:   c5 19 57 f5             vxorpd %xmm5,%xmm12,%xmm14
  60:   c4 41 59 57 f5          vxorpd %xmm13,%xmm4,%xmm14
  70:   c4 41 19 57 f5          vxorpd %xmm13,%xmm12,%xmm14

For half of the xors the length is wrong.  This is issue 1) from
http://gcc.gnu.org/ml/gcc-patches/2009-05/msg01808.html
See http://gcc.gnu.org/ml/gcc-patches/2009-05/msg01339.html
for shell script to check sizes.

The issue here is that as one extended bit is in the base byte, and the
remaining two are in the second byte, just looking for extended registers among
the operands is not enough, you need to know which operand will it be.  It is
possible all insns have operands layed out similarly, so that you could do if
the insn has just one operand, assume something, otherwise if it has two,
assume which one is the special one, similarly for 3 etc.  Perhaps we'll need
some exceptions, which can be either handled by coming up with a new attribute
or just by overriding some other attribute.