[Bug rtl-optimization/46219] New: Generate indirect jump instruction on x86-64

["adam at consulting dot net.nz" <gcc-bugzilla@gcc.gnu.org>]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=46219

           Summary: Generate indirect jump instruction on x86-64
           Product: gcc
           Version: unknown
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: rtl-optimization
        AssignedTo: unassigned@gcc.gnu.org
        ReportedBy: adam@consulting.net.nz
            Target: x86-64


Is there a less brutal way to coax gcc into generating an indirect jump
instruction on x86-64?

typedef void (*dispatch_t)(long offset);

dispatch_t dispatch[256];

void make_indirect_jump(long offset) {
  dispatch[offset](offset);
}

void force_use_of_indirect_jump_instruction(long offset) {
  asm ("jmp *dispatch( ,%0, 8)\n" : : "r" (offset));
  __builtin_unreachable();
}

int main() {
  return 0;
}

$ gcc-snapshot.sh -std=gnu99 -O3 use-indirect-jump-instruction.c && objdump -d
-m i386:x86-64:intel a.out|less

0000000000400480 <make_indirect_jump>:
  400480:       48 8b 04 fd 20 12 60    mov    rax,QWORD PTR [rdi*8+0x601220]
  400487:       00 
  400488:       ff e0                   jmp    rax
  40048a:       66 0f 1f 44 00 00       nop    WORD PTR [rax+rax*1+0x0]

0000000000400490 <force_use_of_indirect_jump_instruction>:
  400490:       ff 24 fd 20 12 60 00    jmp    QWORD PTR [rdi*8+0x601220]
  400497:       66 0f 1f 84 00 00 00    nop    WORD PTR [rax+rax*1+0x0]
  40049e:       00 00 

This combination of inline assembly and __builtin_unreachable() is not a
generally usable architecture-specific solution (there needs to be a way to
ensure the results of modified input arguments end up in the same registers for
the opaque tail call. It works in this case because offset remains unmodified,
satisfying the ABI for dispatch_t).