From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 21863 invoked by alias); 24 Nov 2010 00:31:06 -0000 Received: (qmail 21849 invoked by uid 22791); 24 Nov 2010 00:31:05 -0000 X-SWARE-Spam-Status: No, hits=-2.8 required=5.0 tests=ALL_TRUSTED,AWL,BAYES_00,TW_CB X-Spam-Check-By: sourceware.org Received: from localhost (HELO gcc.gnu.org) (127.0.0.1) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Wed, 24 Nov 2010 00:30:43 +0000 From: "carrot at google dot com" To: gcc-bugs@gcc.gnu.org Subject: [Bug target/46631] New: Change operands order so we can use 16bit and instead of 32bit in thumb2 X-Bugzilla-Reason: CC X-Bugzilla-Type: new X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: target X-Bugzilla-Keywords: X-Bugzilla-Severity: normal X-Bugzilla-Who: carrot at google dot com X-Bugzilla-Status: UNCONFIRMED X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: --- X-Bugzilla-Changed-Fields: Message-ID: X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated Content-Type: text/plain; charset="UTF-8" MIME-Version: 1.0 Date: Wed, 24 Nov 2010 02:57:00 -0000 Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org X-SW-Source: 2010-11/txt/msg02940.txt.bz2 http://gcc.gnu.org/bugzilla/show_bug.cgi?id=46631 Summary: Change operands order so we can use 16bit and instead of 32bit in thumb2 Product: gcc Version: 4.6.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: target AssignedTo: unassigned@gcc.gnu.org ReportedBy: carrot@google.com CC: carrot@google.com Compile the following code with options -march=armv7-a -mthumb -Os struct S { int bi_buf; int bi_valid; }; int tz (struct S* p, int bits, int value) { if (p == 0) return 1; p->bi_valid = bits; p->bi_buf = value & ((1 << bits) - 1); return 0; } GCC 4.6 generates: 00000000 : 0: 2301 movs r3, #1 2: b138 cbz r0, 14 4: 408b lsls r3, r1 6: 6041 str r1, [r0, #4] 8: 3b01 subs r3, #1 a: ea03 0202 and.w r2, r3, r2 // A e: 6002 str r2, [r0, #0] 10: 2000 movs r0, #0 12: 4770 bx lr 14: 4618 mov r0, r3 16: 4770 bx lr Notice instruction A is 32 bit, if we change it to and r2, r2, r3 then we can encode it as 16bit.