From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 21119 invoked by alias); 27 Jan 2011 17:22:07 -0000 Received: (qmail 21107 invoked by uid 22791); 27 Jan 2011 17:22:06 -0000 X-SWARE-Spam-Status: No, hits=-2.9 required=5.0 tests=ALL_TRUSTED,AWL,BAYES_00 X-Spam-Check-By: sourceware.org Received: from localhost (HELO gcc.gnu.org) (127.0.0.1) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Thu, 27 Jan 2011 17:22:02 +0000 From: "jakub at gcc dot gnu.org" To: gcc-bugs@gcc.gnu.org Subject: [Bug rtl-optimization/47477] [4.6 regression] Sub-optimal mov at end of method X-Bugzilla-Reason: CC X-Bugzilla-Type: changed X-Bugzilla-Watch-Reason: None X-Bugzilla-Product: gcc X-Bugzilla-Component: rtl-optimization X-Bugzilla-Keywords: missed-optimization, ra X-Bugzilla-Severity: normal X-Bugzilla-Who: jakub at gcc dot gnu.org X-Bugzilla-Status: NEW X-Bugzilla-Priority: P3 X-Bugzilla-Assigned-To: unassigned at gcc dot gnu.org X-Bugzilla-Target-Milestone: 4.6.0 X-Bugzilla-Changed-Fields: Message-ID: In-Reply-To: References: X-Bugzilla-URL: http://gcc.gnu.org/bugzilla/ Auto-Submitted: auto-generated Content-Type: text/plain; charset="UTF-8" MIME-Version: 1.0 Date: Thu, 27 Jan 2011 17:34:00 -0000 Mailing-List: contact gcc-bugs-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-bugs-owner@gcc.gnu.org X-SW-Source: 2011-01/txt/msg03018.txt.bz2 http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47477 --- Comment #3 from Jakub Jelinek 2011-01-27 17:21:04 UTC --- Not so easily, addsi3_cc is quite specialized pattern and if we add peepholes to help with reg1 = reg1 op reg2; reg2 = reg1 [reg1 DEAD]; I think we'd add it only for a couple of most common arithmetics ops. Wonder whether the splitters couldn't be smarter here, when splitting a doubleword addition see that we only care about a SImode subreg thereof. Or, if lower-subreg.c could do something about it, optimize (insn 10 9 11 2 (parallel [ (set (reg:DI 74) (plus:DI (reg:DI 71) (reg:DI 73))) (clobber (reg:CC 17 flags)) ]) pr47477.c:4 243 {*adddi3_doubleword} (nil)) (insn 11 10 12 2 (set (reg:SI 70) (subreg:SI (reg:DI 74) 0)) pr47477.c:5 64 {*movsi_internal} (nil)) into just SImode addition.