[Bug target/47744] New: [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403

[Bug target/47744] New: [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403

[hjl.tools at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47744

           Summary: [x32] ICE: in reload_cse_simplify_operands, at
                    postreload.c:403
           Product: gcc
           Version: 4.6.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
        AssignedTo: unassigned@gcc.gnu.org
        ReportedBy: hjl.tools@gmail.com


On x32 branch, I got

[hjl@gnu-6 ilp32-21]$ cat m.i
typedef int int32_t;
static const int init_jk[] = {2,3,4,6};
 int __kernel_rem_pio2(double *x, double *y, int e0, int nx, int prec, const
int32_t *ipio2)
{
 int32_t jz,jx,jv,jp,jk,carry,n,iq[20],i,j,k,m,q0,ih;
 double z,fw,f[20],fq[20],q[20];
 jk = init_jk[prec];
 jp = jk;
 jx = nx-1;
 for (i=0;i<=jk;i++) {
     for(j=0,fw=0.0;j<=jx;j++) fw += x[j]*f[jx+i-j]; q[i] = fw;
 }
 for(i=0,j=jz,z=q[jz];j>0;i++,j--) {
     z = q[j-1]+fw;
 }
 n = (int32_t) z;
 return n&7;
}
[hjl@gnu-6 ilp32-21]$ make m.s
/export/build/gnu/gcc-x32/build-x86_64-linux/gcc/xgcc
-B/export/build/gnu/gcc-x32/build-x86_64-linux/gcc/ -S -o m.s -mx32 -std=gnu99 
-O2 -fPIC    m.i
m.i: In function \u2018__kernel_rem_pio2\u2019:
m.i:18:1: error: insn does not satisfy its constraints:
(insn 108 106 186 3 (set (reg:SI 40 r11 [207])
        (plus:SI (plus:SI (mult:SI (reg:SI 1 dx [205])
                    (const_int 8 [0x8]))
                (subreg:SI (plus:DI (reg/f:DI 7 sp)
                        (const_int 208 [0xd0])) 0))
            (const_int -160 [0xffffffffffffff60]))) m.i:3 251 {*lea_1_x32}
     (nil))
m.i:18:1: internal compiler error: in reload_cse_simplify_operands, at
postreload.c:403
Please submit a full bug report,
with preprocessed source if appropriate.
See <http://gcc.gnu.org/bugs.html> for instructions.
make: *** [m.s] Error 1
[hjl@gnu-6 ilp32-21]$

[Bug target/47744] [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403

[hjl.tools at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47744

H.J. Lu <hjl.tools at gmail dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |ubizjak at gmail dot com

--- Comment #1 from H.J. Lu <hjl.tools at gmail dot com> 2011-02-15 06:26:32 UTC ---
A kludge:

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 98fa75d..290907d 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -11735,6 +11735,40 @@ ix86_decompose_address (rtx addr, struct ix86_address
*
out)
   if (disp == const0_rtx && (base || index))
     disp = NULL_RTX;

+  if (TARGET_X32
+      && base
+      && GET_MODE (base) == ptr_mode
+      && GET_CODE (base) == SUBREG
+      && (disp == NULL_RTX
+      || disp == const0_rtx
+      || CONST_INT_P (disp))
+      && GET_CODE (base_reg) == PLUS)
+    {
+      rtx op0 = XEXP (base_reg, 0);
+      rtx op1 = XEXP (base_reg, 1);
+      rtx c;
+      if (REG_P (op0) && CONST_INT_P (op1))
+    {
+      base_reg = op0;
+      c = op1;
+    }
+      else if (REG_P (op1) && CONST_INT_P (op0))
+    {
+      base_reg = op1;
+      c = op0;
+    }
+      else
+    return 0;
+
+      if (disp == NULL_RTX
+      || disp == const0_rtx)
+    disp = c;
+      else
+    disp = GEN_INT (INTVAL (disp) + INTVAL (c));
+
+      base = gen_rtx_REG (ptr_mode, REGNO (base_reg));
+    }
+
   /* Allow arg pointer and stack pointer as index if there is not scaling.  */
   if (base_reg && index_reg && scale == 1
       && (index_reg == arg_pointer_rtx

[Bug target/47744] [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403

[hjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47744

--- Comment #2 from hjl at gcc dot gnu.org <hjl at gcc dot gnu.org> 2011-02-15 13:22:45 UTC ---
Author: hjl
Date: Tue Feb 15 13:22:41 2011
New Revision: 170175

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=170175
Log:
Process (reg + const) base for TARGET_X32.

gcc/

2011-02-15  H.J. Lu  <hongjiu.lu@intel.com>

    PR target/47744
    * config/i386/i386.c (ix86_decompose_address): Process
    (reg + const) base for TARGET_X32.

gcc/testsuite/

2011-02-15  H.J. Lu  <hongjiu.lu@intel.com>

    PR target/47744
    * gcc.dg/torture/pr47744.c: New.

Added:
    branches/x32/gcc/testsuite/gcc.dg/torture/pr47744.c
Modified:
    branches/x32/gcc/ChangeLog.x32
    branches/x32/gcc/config/i386/i386.c
    branches/x32/gcc/testsuite/ChangeLog.x32

[Bug target/47744] [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403

[hjl.tools at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47744

--- Comment #3 from H.J. Lu <hjl.tools at gmail dot com> 2011-02-18 14:05:00 UTC ---
Another testcase:

[hjl@gnu-33 ilp32-24]$ cat x.i
typedef long unsigned int size_t;
typedef long int ssize_t;
typedef ssize_t index_type;
typedef __int128_t GFC_INTEGER_16;
typedef struct descriptor_dimension
{
  index_type _stride;
  index_type _lbound;
  index_type _ubound;
}
descriptor_dimension;
typedef struct { GFC_INTEGER_16 *data; size_t offset; index_type dtype;
descriptor_dimension dim[7];} gfc_array_i16;
void
matmul_i16 (gfc_array_i16 * const restrict retarray,
        gfc_array_i16 * const restrict a,
        GFC_INTEGER_16 bbase_yn)
{
  GFC_INTEGER_16 * restrict dest;
  index_type rxstride, rystride;
  index_type x, y, n, count, xcount;
  GFC_INTEGER_16 * restrict dest_y;
  GFC_INTEGER_16 s;
  const GFC_INTEGER_16 * restrict abase_n;
  rxstride = ((retarray)->dim[0]._stride);
  rystride = ((retarray)->dim[1]._stride);
  xcount = ((a)->dim[0]._ubound + 1 - (a)->dim[0]._lbound);
  dest = retarray->data;
  dest_y = &dest[y*rystride];
  for (x = 0; x < xcount; x++)
    dest_y[x] += abase_n[x] * bbase_yn;
  for (x = 0; x < xcount; x++)
    {
      for (n = 0; n < count; n++)
    dest_y[x*rxstride] = (GFC_INTEGER_16) 0;
    }
}
[hjl@gnu-33 ilp32-24]$ make
/export/build/gnu/gcc-x32/build-x86_64-linux/gcc/xgcc
-B/export/build/gnu/gcc-x32/build-x86_64-linux/gcc/ -S -o x.s -mx32 -O2
-std=gnu99 -ftree-vectorize   x.i
x.i: In function \u2018matmul_i16\u2019:
x.i:36:1: error: insn does not satisfy its constraints:
(insn 113 65 66 4 (set (reg:TI 0 ax)
        (mem:TI (zero_extend:DI (plus:SI (reg:SI 4 si [orig:112 ivtmp.28 ]
[112])
                    (reg:SI 39 r10 [orig:98 dest_y ] [98]))) [6 MEM[base:
dest_y_18, index: ivtmp.28_57, offset: 0B]+0 S16 A128])) x.i:30 60
{*movti_internal_rex64}
     (nil))
x.i:36:1: internal compiler error: in reload_cse_simplify_operands, at
postreload.c:403
Please submit a full bug report,
with preprocessed source if appropriate.
See <http://gcc.gnu.org/bugs.html> for instructions.
make: *** [x.s] Error 1
[hjl@gnu-33 ilp32-24]$

[Bug target/47744] [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403

[hjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47744

--- Comment #4 from hjl at gcc dot gnu.org <hjl at gcc dot gnu.org> 2011-02-18 19:13:06 UTC ---
Author: hjl
Date: Fri Feb 18 19:13:03 2011
New Revision: 170282

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=170282
Log:
Add ix86_simplify_base_disp and use it for x32.

gcc/

2011-02-18  H.J. Lu  <hongjiu.lu@intel.com>

    PR target/47744
    * config/i386/i386.c (ix86_simplify_base_disp): New.
    (ix86_decompose_address): Use it for TARGET_X32 after reload
    is completed.

gcc/testsuite/

2011-02-18  H.J. Lu  <hongjiu.lu@intel.com>

    PR target/47744
    * gcc.dg/torture/pr47744-2.c: New.

Added:
    branches/x32/gcc/testsuite/gcc.dg/torture/pr47744-2.c
Modified:
    branches/x32/gcc/ChangeLog.x32
    branches/x32/gcc/config/i386/i386.c
    branches/x32/gcc/testsuite/ChangeLog.x32

[Bug target/47744] [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403

[hjl.tools at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47744

--- Comment #5 from H.J. Lu <hjl.tools at gmail dot com> 2011-03-01 17:27:00 UTC ---
Another one:

[hjl@gnu-6 ilp32-26]$ cat x.c
typedef union rtunion_def {
  struct rtx_def *rtx;
} rtunion;
typedef struct rtx_def {
  unsigned short code;
  rtunion fld[1];
} *rtx;
extern rtx recog_operand[];
extern rtx *recog_operand_loc[];
extern int reload_n_operands;
extern void find_dummy_reload (int, int);
extern int asm_noperands (rtx);
extern int n_occurrences (char **);
char operands_match[10][10];
void find_reloads (rtx insn, int n_alternatives, int commutative)
{
  register int i, j;
  int noperands;
  char *constraints[10];
  int address_reloaded[10];
  int this_alternative[10];
  char this_alternative_win[10];
  int this_alternative_matches[10];
  int this_alternative_number;
  rtx body = ((insn)->fld[3].rtx);
  int operand_mode[10];
  if (body->code == 1)
    {
      reload_n_operands = noperands = asm_noperands (body);
      n_alternatives = n_occurrences (constraints);
    }
  for (this_alternative_number = 0;
       this_alternative_number < n_alternatives;
       this_alternative_number++)
    for (i = 0;
     i < noperands;
     i++)
      {
    register char *p = constraints[i];
    register int win = 0;
    int badop = 1;
    int c;
    register rtx operand = recog_operand[i];
    int force_reload = 0;
    this_alternative_win[i] = 0;
    this_alternative[i] = 1;
    while (*p && (c = *p++) != ',')
      switch (c)
        {
        case '4':
          c -= '0';
          this_alternative_matches[i] = c;
          if ((c != commutative
           || i != commutative + 1)
          && operands_match[c][i])
        win = this_alternative_win[c];
          else
        find_dummy_reload (operand_mode[i], this_alternative[c]);
          if (! win || force_reload)
        for (j = 0; j < i; j++)
          if (this_alternative_matches[j]
              == this_alternative_matches[i])
            badop = 1;
          break;
        case '<':
          if (operand->code == 2
          && ! address_reloaded[i]
          && operand->fld[0].rtx->code == 3)
        win = 1;
        }
      }
}
[hjl@gnu-6 ilp32-26]$ make
/export/build/gnu/gcc-x32/build-x86_64-linux/gcc/xgcc
-B/export/build/gnu/gcc-x32/build-x86_64-linux/gcc/ -S -o x.s -mx32 -O  x.c
x.c: In function ‘find_reloads’:
x.c:72:1: error: insn does not satisfy its constraints:
(insn 173 171 174 21 (set (reg:SI 0 ax [169])
        (plus:SI (plus:SI (reg:SI 44 r15 [175])
                (subreg:SI (plus:DI (reg/f:DI 7 sp)
                        (const_int 240 [0xf0])) 0))
            (const_int -96 [0xffffffffffffffa0]))) x.c:67 251 {*lea_1_x32}
     (nil))
x.c:72:1: internal compiler error: in reload_cse_simplify_operands, at
postreload.c:403
Please submit a full bug report,
with preprocessed source if appropriate.
See <http://gcc.gnu.org/bugs.html> for instructions.
make: *** [x.s] Error 1
[hjl@gnu-6 ilp32-26]$

[Bug target/47744] [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403

[hjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47744

--- Comment #6 from hjl at gcc dot gnu.org <hjl at gcc dot gnu.org> 2011-03-01 19:21:21 UTC ---
Author: hjl
Date: Tue Mar  1 19:21:18 2011
New Revision: 170599

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=170599
Log:
Add PLUS bas support to ix86_simplify_base_disp.

gcc/

2011-03-01  H.J. Lu  <hongjiu.lu@intel.com>

    PR target/47744
    * config/i386/i386.c (ix86_simplify_base_disp): Add PLUS base
    support.
    (ix86_decompose_address): Updated.

gcc/testsuite/

2011-03-01  H.J. Lu  <hongjiu.lu@intel.com>

    PR target/47744
    * gcc.dg/torture/pr47744-3.c: New.

Added:
    branches/x32/gcc/testsuite/gcc.dg/torture/pr47744-3.c
Modified:
    branches/x32/gcc/ChangeLog.x32
    branches/x32/gcc/config/i386/i386.c
    branches/x32/gcc/testsuite/ChangeLog.x32

[Bug target/47744] [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403

[hjl.tools at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47744

--- Comment #7 from H.J. Lu <hjl.tools at gmail dot com> 2011-03-29 04:06:02 UTC ---
Another testcase:

[hjl@gnu-6 gcc]$ ./xgcc -B./
/export/gnu/import/git/gcc-x32/gcc/testsuite/gfortran.dg/eoshift_large_1.f90
-Os -pedantic-errors  -S  -mx32
/export/gnu/import/git/gcc-x32/gcc/testsuite/gfortran.dg/eoshift_large_1.f90:
In function \u2018intrinsic_eoshift\u2019:
/export/gnu/import/git/gcc-x32/gcc/testsuite/gfortran.dg/eoshift_large_1.f90:106:0:
error: insn does not satisfy its constraints:
(insn 3117 2287 2288 208 (set (reg:TI 41 r12)
        (mem/u/c:TI (zero_extend:DI (plus:SI (plus:SI (reg:SI 1 dx [orig:963
ivtmp.408 ] [963])
                        (reg:SI 0 ax [orig:1214 ivtmp.417 ] [1214]))
                    (symbol_ref:SI ("A.190.2202") [flags 0x2] <var_decl
0x7ffff0d7cc80 A.190>))) [6 MEM[symbol: A.190, base: ivtmp.417_1486, index:
ivtmp.408_1391, offset: 0B]+0 S16 A128]))
/export/gnu/import/git/gcc-x32/gcc/testsuite/gfortran.dg/eoshift_large_1.f90:97
60 {*movti_internal_rex64}
     (nil))
/export/gnu/import/git/gcc-x32/gcc/testsuite/gfortran.dg/eoshift_large_1.f90:106:0:
internal compiler error: in reload_cse_simplify_operands, at postreload.c:403
Please submit a full bug report,
with preprocessed source if appropriate.
See <http://gcc.gnu.org/bugs.html> for instructions.
[hjl@gnu-6 gcc]$

[Bug target/47744] [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403

[hjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47744

--- Comment #8 from hjl at gcc dot gnu.org <hjl at gcc dot gnu.org> 2011-04-02 05:31:30 UTC ---
Author: hjl
Date: Sat Apr  2 05:31:27 2011
New Revision: 171871

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=171871
Log:
Add ZERO_EXTEND PLUS base support to ix86_simplify_base_disp.

2011-03-17  H.J. Lu  <hongjiu.lu@intel.com>

    PR target/47744
    * config/i386/i386.c (ix86_simplify_base_disp): Add ZERO_EXTEND
    PLUS base support.

Modified:
    branches/x32/gcc/ChangeLog.x32
    branches/x32/gcc/config/i386/i386.c

[Bug target/47744] [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403

[hjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47744

--- Comment #9 from hjl at gcc dot gnu.org <hjl at gcc dot gnu.org> 2011-04-02 05:50:32 UTC ---
Author: hjl
Date: Sat Apr  2 05:50:29 2011
New Revision: 171876

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=171876
Log:
Add symbol plus constant support.

2011-03-28  H.J. Lu  <hongjiu.lu@intel.com>

    PR target/47744
    * config/i386/i386.c (ix86_simplify_base_disp): Add symbol plus
    constant support.

Modified:
    branches/x32/gcc/ChangeLog.x32
    branches/x32/gcc/config/i386/i386.c

[Bug target/47744] [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403

[ubizjak at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47744

--- Comment #10 from Uros Bizjak <ubizjak at gmail dot com> 2011-07-17 17:26:15 UTC ---
Compiling with current mainline, I got:

pr47744.c:5:1: internal compiler error: in create_mem_ref, at
tree-ssa-address.c:806
Please submit a full bug report,

for all three examples here.

Apparently, current mainline does not survive tree passes yet ...

[Bug target/47744] [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403

[ubizjak at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47744

--- Comment #11 from Uros Bizjak <ubizjak at gmail dot com> 2011-07-17 17:26:58 UTC ---
(In reply to comment #10)

> Apparently, current mainline does not survive tree passes yet ...

gcc version 4.7.0 20110717 (experimental) [trunk revision 176373] (GCC)

[Bug target/47744] [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403

[hjl.tools at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47744

--- Comment #12 from H.J. Lu <hjl.tools at gmail dot com> 2011-07-17 18:28:57 UTC ---
(In reply to comment #11)
> (In reply to comment #10)
> 
> > Apparently, current mainline does not survive tree passes yet ...
> 
> gcc version 4.7.0 20110717 (experimental) [trunk revision 176373] (GCC)

There are quite a few changes still waiting to be merged from
x32 branch.  I have broken them into smaller pieces for easy
review.  I will try to submit all of them next week.

BTW, I have been keeping x32 branch very much up to date.

[Bug target/47744] [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403

[ubizjak at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47744

--- Comment #13 from Uros Bizjak <ubizjak at gmail dot com> 2011-07-17 20:02:40 UTC ---
Looking at the example in Comment #0, RTX expansion pass generates:

;; D.2794_77 = &q + D.2793_76;

(insn 84 83 85 (parallel [
            (set (reg:DI 173)
                (plus:DI (reg/f:DI 54 virtual-stack-vars)
                    (const_int -160 [0xffffffffffffff60])))
            (clobber (reg:CC 17 flags))
        ]) pr47744.c:5 -1
     (nil))

Why 64bit virtual register to hold &q _address_?

[Bug target/47744] [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403

[ubizjak at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47744

--- Comment #14 from Uros Bizjak <ubizjak at gmail dot com> 2011-07-17 20:07:38 UTC ---
(In reply to comment #13)
> Looking at the example in Comment #0, RTX expansion pass generates:
> 
> ;; D.2794_77 = &q + D.2793_76;
> 
> (insn 84 83 85 (parallel [
>             (set (reg:DI 173)
>                 (plus:DI (reg/f:DI 54 virtual-stack-vars)
>                     (const_int -160 [0xffffffffffffff60])))
>             (clobber (reg:CC 17 flags))
>         ]) pr47744.c:5 -1
>      (nil))
> 
> Why 64bit virtual register to hold &q _address_?

Later, reg:DI 173 gets propagated into (insn 89):

(insn 89 87 90 3 (set (reg:SI 177)
        (plus:SI (plus:SI (mult:SI (reg:SI 175)
                    (const_int 8 [0x8]))
                (subreg:SI (reg/f:DI 20 frame) 0))
            (const_int -160 [0xffffffffffffff60]))) pr47744.c:5 250
{*lea_2_x32}
     (expr_list:REG_DEAD (reg:SI 175)
        (nil)))

which chokes reload when trying to eliminate frame pointer:

(insn 89 87 90 3 (set (reg:SI 39 r10 [177])
        (plus:SI (plus:SI (mult:SI (reg:SI 0 ax [175])
                    (const_int 8 [0x8]))
                (subreg:SI (plus:DI (reg/f:DI 7 sp)
                        (const_int 200 [0xc8])) 0))
            (const_int -160 [0xffffffffffffff60]))) pr47744.c:5 250
{*lea_2_x32}
     (nil))

[Bug target/47744] [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403

[hjl.tools at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47744

--- Comment #15 from H.J. Lu <hjl.tools at gmail dot com> 2011-07-17 20:26:47 UTC ---
(In reply to comment #13)
> Looking at the example in Comment #0, RTX expansion pass generates:
> 
> ;; D.2794_77 = &q + D.2793_76;
> 
> (insn 84 83 85 (parallel [
>             (set (reg:DI 173)
>                 (plus:DI (reg/f:DI 54 virtual-stack-vars)
>                     (const_int -160 [0xffffffffffffff60])))
>             (clobber (reg:CC 17 flags))
>         ]) pr47744.c:5 -1
>      (nil))
> 
> Why 64bit virtual register to hold &q _address_?

I guess it is because we use 64bit Pmode for x32.

[Bug target/47744] [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403

[ubizjak at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47744

--- Comment #16 from Uros Bizjak <ubizjak at gmail dot com> 2011-07-17 21:14:05 UTC ---
Following patch to original ix86_decompose_address solves all failures for me:

--cut here--
Index: i386.c
===================================================================
--- i386.c    (revision 176373)
+++ i386.c    (working copy)
@@ -11149,8 +11149,11 @@ ix86_decompose_address (rtx addr, struct
         return 0;
           break;

-        case REG:
         case SUBREG:
+          if (GET_CODE (op) != REG)
+        return 0;
+
+        case REG:
           if (!base)
         base = op;
           else if (!index)
--cut here--

The patch simply prevents subregs of anything else than registers in addresses.

So, instead of mess as in comment 14, we have a sequence of two instructions:

(insn 185 87 89 3 (set (reg:DI 0 ax)
        (plus:DI (reg/f:DI 7 sp)
            (const_int 200 [0xc8]))) pr47744.c:5 248 {*lea_1}
     (nil))

(insn 89 185 90 3 (set (reg:SI 40 r11 [177])
        (plus:SI (plus:SI (mult:SI (reg:SI 40 r11 [175])
                    (const_int 8 [0x8]))
                (reg:SI 0 ax))
            (const_int -160 [0xffffffffffffff60]))) pr47744.c:5 286
{*lea_general_3}
     (nil))

Please note, that "normal" lea instructions are now generated, no need for some
special x32 versions.

BTW: I'd also argue that this sequence is more correct w.r.t. to overflows, but
I didn't investigate this since it is already late in the night here...

[Bug target/47744] [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403

[hjl.tools at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47744

--- Comment #17 from H.J. Lu <hjl.tools at gmail dot com> 2011-07-17 21:21:01 UTC ---
(In reply to comment #16)
> Following patch to original ix86_decompose_address solves all failures for me:
> 
> --cut here--
> Index: i386.c
> ===================================================================
> --- i386.c    (revision 176373)
> +++ i386.c    (working copy)
> @@ -11149,8 +11149,11 @@ ix86_decompose_address (rtx addr, struct
>          return 0;
>            break;
> 
> -        case REG:
>          case SUBREG:
> +          if (GET_CODE (op) != REG)
> +        return 0;
> +
> +        case REG:
>            if (!base)
>          base = op;
>            else if (!index)
> --cut here--
> 
> The patch simply prevents subregs of anything else than registers in addresses.
> 
> So, instead of mess as in comment 14, we have a sequence of two instructions:
> 
> (insn 185 87 89 3 (set (reg:DI 0 ax)
>         (plus:DI (reg/f:DI 7 sp)
>             (const_int 200 [0xc8]))) pr47744.c:5 248 {*lea_1}
>      (nil))
> 
> (insn 89 185 90 3 (set (reg:SI 40 r11 [177])
>         (plus:SI (plus:SI (mult:SI (reg:SI 40 r11 [175])
>                     (const_int 8 [0x8]))
>                 (reg:SI 0 ax))
>             (const_int -160 [0xffffffffffffff60]))) pr47744.c:5 286
> {*lea_general_3}
>      (nil))
> 
> Please note, that "normal" lea instructions are now generated, no need for some
> special x32 versions.
> 
> BTW: I'd also argue that this sequence is more correct w.r.t. to overflows, but
> I didn't investigate this since it is already late in the night here...

I will give it a try on x32 branch.  Thanks.

[Bug target/47744] [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403

[hjl.tools at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47744

--- Comment #18 from H.J. Lu <hjl.tools at gmail dot com> 2011-07-17 21:28:02 UTC ---
(In reply to comment #16)
> Following patch to original ix86_decompose_address solves all failures for me:
> 
> --cut here--
> Index: i386.c
> ===================================================================
> --- i386.c    (revision 176373)
> +++ i386.c    (working copy)
> @@ -11149,8 +11149,11 @@ ix86_decompose_address (rtx addr, struct
>          return 0;
>            break;
> 
> -        case REG:
>          case SUBREG:
> +          if (GET_CODE (op) != REG)
> +        return 0;
> +
> +        case REG:
>            if (!base)
>          base = op;
>            else if (!index)
> --cut here--

This is the same as

---
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index c728c51..414b528 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -11380,7 +11382,6 @@ ix86_decompose_address (rtx addr, struct ix86_address
*out)
           break;

         case REG:
-        case SUBREG:
           if (!base)
         base = op;
           else if (!index)
--

[Bug target/47744] [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403

[ubizjak at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47744

--- Comment #19 from Uros Bizjak <ubizjak at gmail dot com> 2011-07-17 22:04:31 UTC ---
(In reply to comment #18)

> This is the same as
> 
> ---
> diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
> index c728c51..414b528 100644
> --- a/gcc/config/i386/i386.c
> +++ b/gcc/config/i386/i386.c
> @@ -11380,7 +11382,6 @@ ix86_decompose_address (rtx addr, struct ix86_address
> *out)
>            break;
> 
>          case REG:
> -        case SUBREG:
>            if (!base)
>          base = op;
>            else if (!index)

No!

Subreg of a reg is perfectly valid RTX here.

[Bug target/47744] [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403

[hjl.tools at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47744

--- Comment #20 from H.J. Lu <hjl.tools at gmail dot com> 2011-07-17 22:12:20 UTC ---
(In reply to comment #19)
> (In reply to comment #18)
> 
> > This is the same as
> > 
> > ---
> > diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
> > index c728c51..414b528 100644
> > --- a/gcc/config/i386/i386.c
> > +++ b/gcc/config/i386/i386.c
> > @@ -11380,7 +11382,6 @@ ix86_decompose_address (rtx addr, struct ix86_address
> > *out)
> >            break;
> > 
> >          case REG:
> > -        case SUBREG:
> >            if (!base)
> >          base = op;
> >            else if (!index)
> 
> No!
> 
> Subreg of a reg is perfectly valid RTX here.

The code in question is

    switch (GET_CODE (op))
      {
        ...
      case REG:
      case SUBREG:
        ...
        break;
        ...
      default:
        return 0;
     }

     case SUBREG:
       if (GET_CODE (op) != REG)
         return 0;

always return 0.

[Bug target/47744] [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403

[ubizjak at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47744

--- Comment #21 from Uros Bizjak <ubizjak at gmail dot com> 2011-07-17 22:17:31 UTC ---
Ah, I see. So:

        case SUBREG:
          if (SUBREG_REG (op) != REG)
        return 0;

Works OK, too.

[Bug target/47744] [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403

[hjl.tools at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47744

--- Comment #22 from H.J. Lu <hjl.tools at gmail dot com> 2011-07-17 22:44:10 UTC ---
(In reply to comment #21)
> Ah, I see. So:
> 
>         case SUBREG:
>           if (SUBREG_REG (op) != REG)
>         return 0;
> 
> Works OK, too.

Did you mean

            case SUBREG:
              if (GET_CODE (SUBREG_REG (op)) != REG)
                return 0;

[Bug target/47744] [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403

[ubizjak at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47744

--- Comment #23 from Uros Bizjak <ubizjak at gmail dot com> 2011-07-17 22:48:14 UTC ---
(In reply to comment #22)

> 
>             case SUBREG:
>               if (GET_CODE (SUBREG_REG (op)) != REG)
>                 return 0;

Yes.

[Bug target/47744] [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403

[hjl.tools at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47744

--- Comment #24 from H.J. Lu <hjl.tools at gmail dot com> 2011-07-17 22:55:26 UTC ---
(In reply to comment #23)
> (In reply to comment #22)
> 
> > 
> >             case SUBREG:
> >               if (GET_CODE (SUBREG_REG (op)) != REG)
> >                 return 0;
> 
> Yes.

It doesn't work. I got

/export/gnu/import/git/gcc-x32/libgfortran/generated/matmul_i16.c: In function
\u2018matmul_i16\u2019:
/export/gnu/import/git/gcc-x32/libgfortran/generated/matmul_i16.c:374:1: error:
insn does not satisfy its constraints:
(insn 3660 703 704 76 (set (reg:TI 0 ax)
        (mem:TI (zero_extend:DI (plus:SI (reg:SI 2 cx [orig:818 ivtmp.117 ]
[818])
                    (reg:SI 5 di [orig:292 dest_y ] [292]))) [6 MEM[base:
dest_y_236, index: ivtmp.117_554, offset: 0B]+0 S16 A128]))
/export/gnu/import/git/gcc-x32/libgfortran/generated/matmul_i16.c:284 60
{*movti_internal_rex64}
     (nil))
/export/gnu/import/git/gcc-x32/libgfortran/generated/matmul_i16.c:374:1:
internal compiler error: in reload_cse_simplify_operands, at postreload.c:403
Please submit a full bug report,
with preprocessed source if appropriate.
See <http://gcc.gnu.org/bugs.html> for instructions.
make[6]: *** [matmul_i16.lo] Error 1

[Bug target/47744] [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403

[ubizjak at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47744

--- Comment #25 from Uros Bizjak <ubizjak at gmail dot com> 2011-07-17 22:59:39 UTC ---
> It doesn't work. I got

Yeah, I found the problem, we have to allow only non-eliminable registers.

Please try this:

        case SUBREG:
          if (TARGET_X32
          && !register_no_elim_operand (op, Pmode))
        return 0;

[Bug target/47744] [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403

[hjl.tools at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47744

--- Comment #26 from H.J. Lu <hjl.tools at gmail dot com> 2011-07-18 00:02:41 UTC ---
(In reply to comment #25)
> > It doesn't work. I got
> 
> Yeah, I found the problem, we have to allow only non-eliminable registers.
> 
> Please try this:
> 
>         case SUBREG:
>           if (TARGET_X32
>           && !register_no_elim_operand (op, Pmode))
>         return 0;

It works much better.  But it still caused a few regressions on x32 branch:

FAIL: gcc.target/i386/pr45670.c scan-assembler-not lea[lq]
FAIL: gfortran.dg/character_array_constructor_1.f90  -O1  (internal compiler
error)
FAIL: gfortran.dg/character_array_constructor_1.f90  -O1  (test for excess
errors)
FAIL: gfortran.dg/cshift_large_1.f90  -Os  (internal compiler error)
FAIL: gfortran.dg/cshift_large_1.f90  -Os  (test for excess errors)
FAIL: gfortran.dg/eoshift_large_1.f90  -Os  (internal compiler error)
FAIL: gfortran.dg/eoshift_large_1.f90  -Os  (test for excess errors)

[Bug target/47744] [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403

[hjl.tools at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47744

--- Comment #27 from H.J. Lu <hjl.tools at gmail dot com> 2011-07-18 04:17:24 UTC ---
(In reply to comment #26)

> It works much better.  But it still caused a few regressions on x32 branch:
> 
> FAIL: gfortran.dg/character_array_constructor_1.f90  -O1  (internal compiler
> error)
> FAIL: gfortran.dg/character_array_constructor_1.f90  -O1  (test for excess
> errors)
> FAIL: gfortran.dg/cshift_large_1.f90  -Os  (internal compiler error)
> FAIL: gfortran.dg/cshift_large_1.f90  -Os  (test for excess errors)
> FAIL: gfortran.dg/eoshift_large_1.f90  -Os  (internal compiler error)
> FAIL: gfortran.dg/eoshift_large_1.f90  -Os  (test for excess errors)

They are fixed.

[Bug target/47744] [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403

[ubizjak at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47744

--- Comment #28 from Uros Bizjak <ubizjak at gmail dot com> 2011-07-18 09:08:39 UTC ---
Here is my latest proposed patch:

--cut here--
Index: i386.c
===================================================================
--- i386.c    (revision 176386)
+++ i386.c    (working copy)
@@ -11149,8 +11149,13 @@
         return 0;
           break;

+        case SUBREG:
+          /* Allow only subregs of DImode hard regs in PLUS chains.  */
+          if (!register_no_elim_operand (SUBREG_REG (op), DImode))
+        return 0;
+          /* FALLTHRU */
+
         case REG:
-        case SUBREG:
           if (!base)
         base = op;
           else if (!index)
--cut here--

The patch will also benefit x86_64 and x86_32. The patch allows only SUBREGs
with DImode non-eliminable hard register. This way paradoxical subregs are
avoided, and at the same time, the patch makes sure that PLUS RTX in wider mode
won't enter the address RTX (via combine pass, register elimination in reload,
etc).

[Bug target/47744] [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403

[hjl.tools at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47744

--- Comment #29 from H.J. Lu <hjl.tools at gmail dot com> 2011-07-18 13:55:05 UTC ---
(In reply to comment #28)
> Here is my latest proposed patch:
> 
> --cut here--
> Index: i386.c
> ===================================================================
> --- i386.c    (revision 176386)
> +++ i386.c    (working copy)
> @@ -11149,8 +11149,13 @@
>          return 0;
>            break;
> 
> +        case SUBREG:
> +          /* Allow only subregs of DImode hard regs in PLUS chains.  */
> +          if (!register_no_elim_operand (SUBREG_REG (op), DImode))
> +        return 0;
> +          /* FALLTHRU */
> +
>          case REG:
> -        case SUBREG:
>            if (!base)
>          base = op;
>            else if (!index)
> --cut here--
> 
> The patch will also benefit x86_64 and x86_32. The patch allows only SUBREGs
> with DImode non-eliminable hard register. This way paradoxical subregs are
> avoided, and at the same time, the patch makes sure that PLUS RTX in wider mode
> won't enter the address RTX (via combine pass, register elimination in reload,
> etc).

This patch increases bootstrap time from

5173.47user 394.52system 14:59.75elapsed 618%CPU (0avgtext+0avgdata
362556maxresident)k

to

7742.94user 475.20system 19:19.84elapsed 708%CPU (0avgtext+0avgdata
362556maxresident)k

[Bug target/47744] [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403

[ubizjak at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47744

--- Comment #30 from Uros Bizjak <ubizjak at gmail dot com> 2011-07-18 14:00:43 UTC ---
(In reply to comment #29)

> This patch increases bootstrap time from

On which target?

[Bug target/47744] [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403

[hjl.tools at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47744

--- Comment #31 from H.J. Lu <hjl.tools at gmail dot com> 2011-07-18 14:04:13 UTC ---
(In reply to comment #30)
> (In reply to comment #29)
> 
> > This patch increases bootstrap time from
> 
> On which target?

I used

--enable-clocale=gnu --with-system-zlib --with-demangler-in-ld
--enable-languages=c,c++,fortran,objc  --prefix=/usr/gcc-4.7.0-x32
--with-local-prefix=/usr/local --enable-gnu-indirect-function
--with-multilib-list=m32,m64,mx32 --enable-cloog-backend=isl
--with-ppl-include=/opt/gnu/include --with-ppl-lib=/opt/gnu/lib64
--with-cloog-include=/opt/gnu/include --with-cloog-lib=/opt/gnu/lib64
--with-fpmath=sse

But I was running SPEC CPU at the same time.  I will re-time it.

[Bug target/47744] [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403

[hjl.tools at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47744

--- Comment #32 from H.J. Lu <hjl.tools at gmail dot com> 2011-07-18 14:54:31 UTC ---
(In reply to comment #31)
> 
> But I was running SPEC CPU at the same time.  I will re-time it.

Is isn't too bad:

5182.95user 396.13system 15:32.41elapsed 598%CPU (0avgtext+0avgdata
362556maxresident)k

It passed SPEC CPU 2K and I am running SPEC CPU 2006 now.  Can
you check in your patch? Thanks.

[Bug target/47744] [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403

[ubizjak at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47744

--- Comment #33 from Uros Bizjak <ubizjak at gmail dot com> 2011-07-18 16:52:59 UTC ---
(In reply to comment #32)

> Is isn't too bad:
> 
> 5182.95user 396.13system 15:32.41elapsed 598%CPU (0avgtext+0avgdata
> 362556maxresident)k

My check on unloaded SNB (using current mainline at r176403, default configure
flags and make -j 8) was in favor of patched gcc:

(unpached)

real    28m40.314s
user    154m2.612s
sys    8m16.934s

vs:

(patched)

real    27m8.057s
user    142m42.522s
sys    7m41.875s

> It passed SPEC CPU 2K and I am running SPEC CPU 2006 now.  Can
> you check in your patch? Thanks.

Will do.

Please also note, that there is no need for new lea_x32 patterns anymore.

[Bug target/47744] [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403

[hjl.tools at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47744

--- Comment #34 from H.J. Lu <hjl.tools at gmail dot com> 2011-07-18 16:55:35 UTC ---
(In reply to comment #33)
> 
> Please also note, that there is no need for new lea_x32 patterns anymore.

My x32 branch has



2011-07-18  Uros Bizjak  <ubizjak@gmail.com>

    PR target/47744
    * config/i386/i386.c (ix86_decompose_address): Allow only subregs
    of DImode hard regs in PLUS chains. 

2011-07-17  H.J. Lu  <hongjiu.lu@intel.com>

    * config/i386/i386.c (ix86_decompose_address): Don't support
    32bit address in x32 mode.

2011-07-17  H.J. Lu  <hongjiu.lu@intel.com>

    * config/i386/i386.c (ix86_fixup_binary_operands): Revert x32
    change.

2011-07-17  H.J. Lu  <hongjiu.lu@intel.com>

    * config/i386/i386.md (*lea_0_x32): Removed.
    (*lea_2_x32): Likewise.
    (*lea_2_zext_x32): Likewise.
    (X32 LEA zero-extend split): Likewise.

2011-07-17  Uros Bizjak  <ubizjak@gmail.com>

    PR target/47744
    * config/i386/i386.c (ix86_decompose_address): Properly handle
    SUBREG for x32.

2011-07-17  H.J. Lu  <hongjiu.lu@intel.com>

    * config/i386/i386.c (ix86_simplify_base_index_disp): Removed.
    (ix86_decompose_address): Don't call it.

[Bug target/47744] [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403

[ubizjak at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47744

--- Comment #35 from Uros Bizjak <ubizjak at gmail dot com> 2011-07-18 17:17:55 UTC ---
(In reply to comment #34)

> 2011-07-17  H.J. Lu  <hongjiu.lu@intel.com>
> 
>     * config/i386/i386.c (ix86_decompose_address): Don't support
>     32bit address in x32 mode.

This one is also not needed anymore.

[Bug target/47744] [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403

[hjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47744

--- Comment #36 from hjl at gcc dot gnu.org <hjl at gcc dot gnu.org> 2011-07-18 17:49:04 UTC ---
Author: hjl
Date: Mon Jul 18 17:49:01 2011
New Revision: 176409

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=176409
Log:
Remove ix86_simplify_base_index_disp.

2011-07-17  Uros Bizjak  <ubizjak@gmail.com>

    PR target/47744
    * config/i386/i386.c (ix86_decompose_address): Properly handle
    SUBREG for x32.

2011-07-17  H.J. Lu  <hongjiu.lu@intel.com>

    * config/i386/i386.c (ix86_simplify_base_index_disp): Removed.
    (ix86_decompose_address): Don't call it.

Added:
    branches/x32/gcc/ChangeLog.addr32
Modified:
    branches/x32/gcc/config/i386/i386.c

[Bug target/47744] [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403

[uros at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47744

--- Comment #37 from uros at gcc dot gnu.org 2011-07-18 17:51:36 UTC ---
Author: uros
Date: Mon Jul 18 17:51:33 2011
New Revision: 176413

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=176413
Log:
    PR target/47744
    * config/i386/i386.c (ix86_decompose_address): Allow only subregs
    of DImode hard registers in PLUS address chains.


Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/config/i386/i386.c

[Bug target/47744] [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403

[hjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47744

--- Comment #38 from hjl at gcc dot gnu.org <hjl at gcc dot gnu.org> 2011-07-18 17:53:46 UTC ---
Author: hjl
Date: Mon Jul 18 17:53:43 2011
New Revision: 176414

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=176414
Log:
Allow only subregs of DImode hard regs in PLUS chains.

2011-07-18  Uros Bizjak  <ubizjak@gmail.com>

    PR target/47744
    * config/i386/i386.c (ix86_decompose_address): Allow only subregs
    of DImode hard regs in PLUS chains. 

Modified:
    branches/x32/gcc/ChangeLog.addr32
    branches/x32/gcc/config/i386/i386.c

[Bug target/47744] [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403

[ubizjak at gmail dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47744

Uros Bizjak <ubizjak at gmail dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |RESOLVED
                URL|                            |http://gcc.gnu.org/ml/gcc-p
                   |                            |atches/2011-07/msg01427.htm
                   |                            |l
         Resolution|                            |FIXED
   Target Milestone|---                         |4.7.0

--- Comment #39 from Uros Bizjak <ubizjak at gmail dot com> 2011-07-18 18:29:49 UTC ---
Fixed.

[Bug target/47744] [x32] ICE: in reload_cse_simplify_operands, at postreload.c:403

[hjl at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47744

--- Comment #40 from hjl at gcc dot gnu.org <hjl at gcc dot gnu.org> 2011-08-03 14:07:36 UTC ---
Author: hjl
Date: Wed Aug  3 14:07:32 2011
New Revision: 177271

URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=177271
Log:
Add testcases for PR target/47744.

2011-08-03  H.J. Lu  <hongjiu.lu@intel.com>

    PR target/47744
    * gcc.dg/torture/pr47744-1.c: New.
    * gcc.dg/torture/pr47744-2.c: Likewise.
    * gcc.dg/torture/pr47744-3.c: Likewise.

Added:
    trunk/gcc/testsuite/gcc.dg/torture/pr47744-1.c
    trunk/gcc/testsuite/gcc.dg/torture/pr47744-2.c
    trunk/gcc/testsuite/gcc.dg/torture/pr47744-3.c
Modified:
    trunk/gcc/testsuite/ChangeLog