[Bug target/47831] New: avoid if-convertion if the conditional instructions and following conditional branch has the same condition

[Bug target/47831] New: avoid if-convertion if the conditional instructions and following conditional branch has the same condition

[carrot at google dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47831

           Summary: avoid if-convertion if the conditional instructions
                    and following conditional branch has the same
                    condition
           Product: gcc
           Version: 4.6.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
        AssignedTo: unassigned@gcc.gnu.org
        ReportedBy: carrot@google.com
            Target: arm-linux-androideabi


Created attachment 23423
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=23423
testcase

Compile the attached source code with options -march=armv7-a -mthumb -Os, GCC
4.6 generates

ras_validate:
    @ args = 0, pretend = 0, frame = 8
    @ frame_needed = 0, uses_anonymous_args = 0
    push    {r0, r1, r4, r5, r6, lr}
    add    r4, sp, #4
    movs    r2, #4
    mov    r1, r4
    mov    r5, r0
    bl    foo
    cmp    r0, #0
    it    ge        // A
    movge    r6, r0    // B
    bge    .L3       // C
    b    .L7       // D
.L4:
    adds    r3, r6, r4
    mov    r0, r5
    subs    r6, r6, #1
    ldrb    r1, [r3, #-1]    @ zero_extendqisi2
    bl    bar
    adds    r3, r0, #1
    beq    .L2
.L3:
    cmp    r6, #0
    bne    .L4
    mov    r0, r6
    b    .L2
.L7:
    mov    r0, #-1
.L2:
    pop    {r2, r3, r4, r5, r6, pc}

Instruction sequence ABCD can be replaced with

       blt    .L7
       mov    r6, r0
       b      .L3

In both cases (lt or ge) the executed instructions is not longer than original
code. So it's shorter and faster.

[Bug target/47831] avoid if-convertion if the conditional instructions and following conditional branch has the same condition

[ibolton at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47831

Ian Bolton <ibolton at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Keywords|                            |missed-optimization
             Status|UNCONFIRMED                 |NEW
   Last reconfirmed|                            |2011.02.22 14:50:03
                 CC|                            |ibolton at gcc dot gnu.org
     Ever Confirmed|0                           |1
      Known to fail|                            |4.6.0

--- Comment #1 from Ian Bolton <ibolton at gcc dot gnu.org> 2011-02-22 14:50:03 UTC ---
Confirmed on r170278 of trunk.

The better sequence that Carrot mentions comes from having if-conversion
disabled (-fno-if-conversion2).

I expect Basic Block Reordering might be able to help out in the case where
if-conversion is enabled, but I think it is still disabled for -Os, as it can
sometimes lead to larger code.

That is a separate issue though.  To tackle this properly, the if-conversion
heuristic would need to be enhanced to detect cases where the codesize will
likely increase and pessimise against those cases when using -Os.

[Bug target/47831] avoid if-convertion if the conditional instructions and following conditional branch has the same condition

[rearnsha at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47831

Richard Earnshaw <rearnsha at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Severity|normal                      |enhancement

[Bug target/47831] avoid if-conversion if the conditional instructions and following conditional branch has the same condition

[steven at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47831

--- Comment #2 from Steven Bosscher <steven at gcc dot gnu.org> 2011-03-05 15:19:41 UTC ---
Got RTL before and after the 2nd if-conversion pass, anyone?

[Bug target/47831] avoid if-conversion if the conditional instructions and following conditional branch has the same condition

[ramana at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47831

Ramana Radhakrishnan <ramana at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |ramana at gcc dot gnu.org

--- Comment #3 from Ramana Radhakrishnan <ramana at gcc dot gnu.org> 2011-08-10 22:20:42 UTC ---
trunk appears to generate : 


ras_validate:
        @ args = 0, pretend = 0, frame = 8
        @ frame_needed = 0, uses_anonymous_args = 0
        push    {r0, r1, r2, r4, r5, lr}
        movs    r2, #4
        add     r1, sp, #4
        mov     r5, r0
        bl      foo
        cmp     r0, #0
        blt     .L5
        subs    r4, r0, #1
        b       .L3
.L4:
        add     r3, sp, #4
        mov     r0, r5
        ldrb    r1, [r3, r4]    @ zero_extendqisi2
        bl      bar
        adds    r2, r0, #1
        beq     .L2
        subs    r4, r4, #1
.L3:
        adds    r3, r4, #1
        bne     .L4
        movs    r0, #0
        b       .L2
.L5:
        mov     r0, #-1
.L2:
        pop     {r1, r2, r3, r4, r5, pc}