[Bug c/47977] New: powerpc (-mcpu=8548) Wrong code for double operations in little endian mode

[Bug c/47977] New: powerpc (-mcpu=8548) Wrong code for double operations in little endian mode

[m.lazzarotto at robox dot it]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47977

           Summary: powerpc (-mcpu=8548) Wrong code for double operations
                    in little endian mode
           Product: gcc
           Version: 4.5.2
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: c
        AssignedTo: unassigned@gcc.gnu.org
        ReportedBy: m.lazzarotto@robox.it


* Output of gcc -v :

COLLECT_GCC=~/gcc-powerpc-4.5.2/bin/powerpc-eabi-gcc
COLLECT_LTO_WRAPPER=~/gcc-powerpc-4.5.2/libexec/gcc/powerpc-eabi/4.5.2/lto-wrapper
Target: powerpc-eabi
Configured with: ~/build-gcc-4.5/src/gcc-4.5.2/configure --prefix
~/gcc-powerpc-4.5.2 --with-local-prefix=~/gcc-powerpc-4.5.2
--enable-languages=c,c++ --target=powerpc-eabi --disable-threads --disable-tls
--disable-libmudflap --disable-libssp --disable-libgomp --with-gnu-ld
--enable-e500-double
Thread model: single
gcc version 4.5.2 (GCC)

* The program that triggers the bug :

[test_fp.c]

double test_fp(double val)
{
    return val + val;
}


* Command line for big-endian :

~/gcc-powerpc-4.5.2/bin/powerpc-eabi-gcc-4.5.2 -c   -mhard-float
-fomit-frame-pointer -fno-exceptions   -Wall -Werror -fpack-struct=8 -G8  
-mcpu=8548 -misel=yes -meabi -O2 -mno-strict-align -mno-multiple
-Wno-strict-aliasing -msdata=none  -S -mbig test_fp.c -o test_fp-be.s

* Command line for little-endian :

~/gcc-powerpc-4.5.2/bin/powerpc-eabi-gcc-4.5.2 -c   -mhard-float
-fomit-frame-pointer -fno-exceptions   -Wall -Werror -fpack-struct=8 -G8  
-mcpu=8548 -misel=yes -meabi -O2 -mno-strict-align -mno-multiple
-Wno-strict-aliasing -msdata=none  -S -mlittle test_fp.c -o test_fp-le.s

* * * The output files, with comments:

$ cat test_fp-be-COMMMENTED.s
        .file   "test_fp.c"
        .gnu_attribute 4, 2
        .gnu_attribute 8, 1
        .gnu_attribute 12, 1
        .section        ".text"
        .align 2
        .globl test_fp
        .type   test_fp, @function
test_fp:
        stwu 1,-16(1)
        efdadd 3,3,3                    # val = val + val
        lwz 9,8(1)                      # What's the purpose ?
        lwz 10,12(1)                    # What's the purpose ?
        evmergehi 9,3,3                 # R9 = HIGH DWORD (correct in big
endian mode)
        mr 10,3                         # R10 = LOW DWORD (correct in big
endian mode)
        stw 9,8(1)                      # What's the purpose ?
        mr 3,9                          # R3 = R9, HIGH dword correct (big
endian)
        stw 10,12(1)                    # What's the purpose ?
        mr 4,10                         # R4 = R10, LOW dword correct (big
endian)
        addi 1,1,16
        blr                             # remarque: is there a way to exit with
a 64 bit register (f.i. R3) ?
        .size   test_fp, .-test_fp
        .ident  "GCC: (GNU) 4.5.2"


$ cat test_fp-le-COMMENTED.s
        .file   "test_fp.c"
        .gnu_attribute 4, 2
        .gnu_attribute 8, 1
        .gnu_attribute 12, 1
        .section        ".text"
        .align 2
        .globl test_fp
        .type   test_fp, @function
test_fp:
        stwu 1,-16(1)
        efdadd 3,3,3                    # val = val + val
        lwz 9,8(1)                      # What's the purpose ?
        lwz 10,12(1)                    # What's the purpose ?
        evmergehi 9,3,3                 # R9 = HIGH DWORD (error in little
endian mode???)
        mr 10,3                         # R10 = LOW DWORD (error in little
endian mode???)
        stw 9,8(1)                      # What's the purpose ?
        mr 3,9                          # R3 = R9, LOW dword expected (little
endian) but R9 is HIGH dword!!!!
        stw 10,12(1)                    # What's the purpose ?
        mr 4,10                         # R4 = R10, HIGH dword expected (little
endian) but R10 is LOW dword!!!
        addi 1,1,16
        blr                             # remarque: is there a way to exit with
a 64 bit register (f.i. R3) ?
        .size   test_fp, .-test_fp
        .ident  "GCC: (GNU) 4.5.2"

[Bug target/47977] powerpc (-mcpu=8548) Wrong code for double operations in little endian mode

[jsm28 at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47977

Joseph S. Myers <jsm28 at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
          Component|c                           |target

--- Comment #1 from Joseph S. Myers <jsm28 at gcc dot gnu.org> 2011-03-03 16:22:13 UTC ---
Using --enable-e500-double for a non-e500 target will produce a broken
compiler.  So if you want e500 double code to work at all, try the
powerpc-eabispe target.  (Or else pass -mabi=spe explicitly.)

It is also known that all the insn patterns for e500 are only expected to work
for big-endian.  In general little-endian Power is hardly tested at all, but
the SPE case is specifically expected to be broken.

[Bug c/47977] powerpc (-mcpu=8548) Wrong code for double operations in little endian mode

[froydnj at codesourcery dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47977

--- Comment #2 from froydnj at codesourcery dot com <froydnj at codesourcery dot com> 2011-03-03 16:51:18 UTC ---
On Thu, Mar 03, 2011 at 04:08:53PM +0000, m.lazzarotto at robox dot it wrote:
>         lwz 9,8(1)                      # What's the purpose ?
>         lwz 10,12(1)                    # What's the purpose ?
>         stw 9,8(1)                      # What's the purpose ?
>         stw 10,12(1)                    # What's the purpose ?

These are an artifact of the lower-subreg pass; the E500 bits contain
some logic to clean up spurious moves introduced by using E500
floating-point, but the lower-subreg pass stymies those bits of logic.

A separate bug for a (sub-)target-specific pass to clean those artifacts
up would be appropriate, but I don't think it's going to happen any time
soon.

[Bug c/47977] powerpc (-mcpu=8548) Wrong code for double operations in little endian mode

[m.lazzarotto at robox dot it]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47977

Marco Lazzarotto <m.lazzarotto at robox dot it> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
          Component|target                      |c

--- Comment #3 from Marco Lazzarotto <m.lazzarotto at robox dot it> 2011-03-04 13:11:21 UTC ---
(In reply to comment #1)
> Using --enable-e500-double for a non-e500 target will produce a broken
> compiler.  So if you want e500 double code to work at all, try the
> powerpc-eabispe target.  (Or else pass -mabi=spe explicitly.)

My target is effectively an e500v2.
I also tried to pass -mabi=spe, with no difference in the output.
Is using --enable-e500-double compile-time equivalent to use -mdouble-float
runtime?

> It is also known that all the insn patterns for e500 are only expected to work
> for big-endian.  In general little-endian Power is hardly tested at all, but
> the SPE case is specifically expected to be broken.

Ok, it's time to test it! :-(

[Bug target/47977] powerpc (-mcpu=8548) Wrong code for double operations in little endian mode

[joseph at codesourcery dot com]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=47977

--- Comment #4 from joseph at codesourcery dot com <joseph at codesourcery dot com> 2011-03-04 15:35:20 UTC ---
On Fri, 4 Mar 2011, m.lazzarotto at robox dot it wrote:

> My target is effectively an e500v2.
> I also tried to pass -mabi=spe, with no difference in the output.
> Is using --enable-e500-double compile-time equivalent to use -mdouble-float
> runtime?

It is roughly equivalent to -mfloat-gprs=double - but it may not work 
sensibly except for the e500-specific targets such as powerpc-eabispe.  
And this is only useful with -mabi=spe.  e500v2 should follow the 
soft-float ABI (in particular, double arguments are passed in two GPRs, 
not one; the only time all 64 bits of a GPR are used for argument passing 
or return is for SPE vectors).  Because of the error-prone nature of 
passing all the required options manually, I advise configuring for 
powerpc-eabispe.

[Bug target/47977] powerpc (-mcpu=8548) Wrong code for double operations in little endian mode

[segher at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=47977

Segher Boessenkool <segher at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |RESOLVED
         Resolution|---                         |WONTFIX
                 CC|                            |segher at gcc dot gnu.org

--- Comment #5 from Segher Boessenkool <segher at gcc dot gnu.org> ---
The powerpcspe backend has been deprecated in GCC 8 and removed during GCC 9
development. See corresponding mailing list threads[1,2,3] for details.

[1] https://gcc.gnu.org/legacy-ml/gcc/2018-04/msg00102.html
[2] https://gcc.gnu.org/legacy-ml/gcc-patches/2018-12/msg00123.html
[3] https://gcc.gnu.org/pipermail/gcc/2020-May/232342.html