[Bug target/48068] New: loongson intrinsics improvement opportunities

[Bug target/48068] New: loongson intrinsics improvement opportunities

[hp at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48068

           Summary: loongson intrinsics improvement opportunities
           Product: gcc
           Version: 4.6.0
            Status: UNCONFIRMED
          Keywords: missed-optimization
          Severity: enhancement
          Priority: P3
         Component: target
        AssignedTo: unassigned@gcc.gnu.org
        ReportedBy: hp@gcc.gnu.org
            Target: mipsel-unknown-linux-gnu, mips64el-unknown-linux-gnu


Created attachment 23621
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=23621
Code showing the three mentioned shortcomings

While writing a Loongson-2E / -2F backend for RAPP,
http://savannah.nongnu.org/projects/rapp/ using gcc52 at the compilefarm I
noticed a few omissions and opportunities for improvements.  I just thought
adding some notes here would be better than nothing.

1. Lack of trivial logical operators on vector types.
There are insns for "or", shifts (the whole vector), xor, orn, and "and" that
can operate directly on the vector registers (the floating point registers),
but there are neither builtins for those operations nor do operations on the
types use the vector registers; attempts generate code that uses regular insns
and general registers.  Looking in the loongson+mips code shows that there's no
support for them.  I had to resort to asms in the port file,
http://git.savannah.gnu.org/cgit/rapp.git/tree/compute/backend/rc_vec_loongson2ef.h
for reference.

2. The pshufh_u and pshufh_s builtins have a spurious unused first operand
(a confusion regarding operand 0 obvious by reading loongson.md).
I understand removing the argument to the intrinsic would break the intrinsics
API, but a corrected intrinsic could be added by a different name or be
requested by a new option, avoiding the extra instructions initializing this
destination-only register caused by specifying it also as an input.

3. Normal scalar operations on 64-bit integers are supported by the ISA
operating on integer contents in the floating-point registers, but lacking
support in the port, except through explicit use through paddd/psubd/pmuluw
intrinsics.  The "clash with mips.md::add<mode>3"-type issues can be solved by
merging these into the normal insn patterns and adding alternatives using
constraints that match only when the loongson vector support is enabled. 
(Though I understand maintainer hesitation adding support for everyones
COP2-integer extensions into the regular insns.)

FWIW, I used the ISA documentation at
http://loongson-dev.googlegroups.com/web/Loongson2FUserGuide.pdf

I'll add a few examples.

[Bug target/48068] loongson intrinsics improvement opportunities

[hp at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48068

--- Comment #1 from Hans-Peter Nilsson <hp at gcc dot gnu.org> 2011-03-11 02:33:00 UTC ---
Created attachment 23622
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=23622
Trivial stdint.h suitable for showing the problem after "make all-gcc"
standalone

[Bug target/48068] loongson intrinsics improvement opportunities

[hp at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48068

--- Comment #2 from Hans-Peter Nilsson <hp at gcc dot gnu.org> 2011-03-11 02:42:15 UTC ---
Created attachment 23623
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=23623
With --target=mipsel-unknown-linux-gnu, result of "./xgcc -W -Wall -O2 -B./ -S
-I. -march=loongson2f x.c -o xo32.s"

With stdint.h in the gcc objdir, run xgcc as in description.

Note the generic-code generated for ior(), the initialization of the
output-only operand for "pshufh" in gag(), and the needless moving between
float/vector and general registers as well as using the general-register-add in
mp() except as mandated by the intrinsic.

[Bug target/48068] loongson intrinsics improvement opportunities

[hp at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48068

--- Comment #3 from Hans-Peter Nilsson <hp at gcc dot gnu.org> 2011-03-11 02:48:00 UTC ---
Created attachment 23624
  --> http://gcc.gnu.org/bugzilla/attachment.cgi?id=23624
23623: With --target=mips64el-unknown-linux-gnu, result of "./xgcc -W -Wall -O2
-B./ -S -I. -march=loongson2f x.c -o xn32.s"

Similar to the previous attachment but for the N32 ABI.
GCC from "trunk revision 170836".

[Bug target/48068] loongson intrinsics improvement opportunities

[hp at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48068

Hans-Peter Nilsson <hp at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |NEW
   Last reconfirmed|                            |2011.04.15 00:46:16
     Ever Confirmed|0                           |1

--- Comment #4 from Hans-Peter Nilsson <hp at gcc dot gnu.org> 2011-04-15 00:46:16 UTC ---
(In reply to comment #0)
> 3. ... and adding alternatives using
> constraints that match only when the loongson vector support is enabled.

Replace with
3. ... and adding alternatives using
constraints or the attribute "enabled" that match only when the loongson vector
support is enabled.
See md.texi node Disable Insn Alternatives

[Bug target/48068] loongson intrinsics improvement opportunities

[hp at gcc dot gnu.org]

http://gcc.gnu.org/bugzilla/show_bug.cgi?id=48068

--- Comment #5 from Hans-Peter Nilsson <hp at gcc dot gnu.org> 2012-03-17 22:17:11 UTC ---
Issue 1 may have been solved by r182662 on trunk, now in 4.7.